You are in:  Design | EDA and IP

Sign-up for newsletters:

Electronics Weekly newsletters - Sign up for Made By Monkeys, Mannerisms, Gadget Master and Daily and Monthly newsletters

IBM, ARM and Cadence act to make SOI chips cost-effective

Richard Wilson
Tuesday 23 March 2010 09:27

IBM is working with ARM and Cadence to remove one of the biggest barriers to more widespread adoption of silicon-on-insulator (SOI) semiconductor process technology.

SOI is known to have definite power and performance advantages over commonly used bulk CMOS process technology.

But its mainstream adoption has been slow because of higher cost and a lack of process proven silicon intellectual property (IP).

Collaboration between IBM, ARM and Cadence, as part of the wider SOI Industry Consortium, will make semiconductor IP blocks proven on the IBM SOI process, such as memory, IO and power management, available for licensing.

ARM has provided 18 IP blocks including memory compilers, IO libraries and power management functions.

IBM’s embedded DRAM IP is also included. 

The intention that the 50 IP block available at launch of the programme will be added two by further IP blocks from across the industry.

Boeing and Synopsys are the next companies to provide IP to the programme.

According to Horacio Mendez, executive director of the SOI Industry, the aim of the IP library is to remove one of three barriers to what he called “mainstream adoption of SOI in the consumer and mobile phone markets”.

Another obstacle has been access to SOI process technology, but according to Mendez, this has been addressed with foundries such as IBM, Globalfoundries and Chartered offering services.

The other main obstacle to adoption is the higher cost of the SOI process compared to equivalent bulk CMOS processes.

“As we are seeing the complexity of bulk CMOS process increasing to match performance and power budgets we are seeing the cost of SOI falling,” said Mendez.

According to a spokeswoman from IBM Microelectronics, there are already SOI devices in consumer products such as games consoles. “That gives us a data point about how the price differential is changing,” said

“It is possible that there could be price parity between SOI and bulk CMOS within a few generations,” said Mendez.

But this is not likely to be the current 45nm generation where Mendez predicted the cost differential will be in “single digits”.

ARM offered its first physical IP libraries for IBM 45nm SOI process more than a year ago. These included standard cell, memory and I/O libraries for IBM's fully enabled 45nm SOI foundry. This IP is now commercially available.

See: ARM forces rethink on low-power process technology

“Through the enablement provided by ARM’s SOI libraries and EDA tool suppliers, a vast range of synthesizable IP is now easily portable to SOI technology and physical IP can be readily ported or designed using industry standard tools,” said Mendez.

A key part of the IP offering is the support of the IBM SOI foundry process and its offering of embedded DRAM.
 
The technology has become established and IBM is in its seventh generation of SOI process technology.

The SOI Portal will be hosted on the ChipEstimate.com site

 

 

Comments powered by Disqus

Related Jobs

Resources