The EDA industry is set to undergo a fundamental change as the
complexity of multi-processor system-on-chip devices renders their
specification, design and verification impossible with the
available languages.
Speaking during a panel session at the IEE's EDA Forum event
last week, Ted Vucurevich, chief technology officer of Cadence
Design Systems said: "Is there going to be a revolution in the way
we talk about multiprocessing systems? I think yes, in the next ten
years there will be a fundamental change."
Echoing the 1990s shift from a gate-based flow to RTL, the
change will be brought about by new entrants to the industry,
according to Simon Davidmann, formerly of Synopsys and Co-Design.
Davidmann said that in designs featuring "seas of processors",
languages such as SystemC and SystemVerilog will simply become
assemblers.
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| Simon Davidmann |
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"The whole EDA industry is really good at going RTL to the silicon.
The challenge is what do we do above that?" he said. "There's going
to be a new industry, building the methodology, the tools and the
representations to do this. It's the only way we're going to make
use of the semiconductors we've got available to us."
Multiprocessor designs, employing huge levels of parallelism to
deliver high compute performance at lower power, are already
appearing.
Davidmann said, it does not make sense to talk about hardware
and software in these cases. The target is the system as a
whole.
"When you've got thousands of processors there isn't software
and hardware, it's just a system with applications running on this
fabric," he said. "The challenge is how to program the fabric."