Rambus says it is licensing memory interface technology which will extend access speeds beyond current DDR3 data rate limits to 3,200Mbit/s.
The next generation of high speed DRAM - DDR4 - is still in the process of being standardised by the JEDEC standards committee.
Independently Rambus has announced the high speed capabilities of its memory interface technology, which will effectively double the speed of DDR3-1600 running on an 800MHz bus.
The higher speed memory interfaces will be necessary for the bandwidth and workloads of multi-core processor-based systems.
“Product advancements in multi-core computing, virtualization and chip integration put ever-increasing demands on the memory sub-system, a key performance limiter in today’s performance computing systems,” said Craig Hampel, Rambus Fellow.
There is also near ground signaling, which supports higher performance at reduced IO power, allowing operation at 0.5V and module threading to improve on memory efficiency.
Rambus has published a whitepaper, “Challenges and Solutions for Future Main Memory” that is available for download.