ClearSpeed Technology has announced that its processor acceleration technology will be used by IBM in its high power computer systems.
It is an endorsement for ClearSpeed’s embedded parallel processor which is already attracted the attention of the world’s largest processor firms including Intel and AMD.
The device incorporates 96 cores that executes up to 25 billion 64-bit floating point operations per second (Flops). It is claimed to be one of the world's fastest 64-bit floating point processors.
"IBM's selection of ClearSpeed validates the inclusion of coprocessor technology as a key component in the next wave of high performance computing (HPC) architectures," said Tom Beese, CEO for ClearSpeed.
The accelerator board combines two CSX600 processors in a PCI-X form factor that delivers up to 50 GFlops of sustained double-precision general matrix-matrix multiply (DGEMM) performance while averaging less than 25W.
IBM will use it in its System Cluster 1350 which is used by finance, oil and gas, life sciences and other production oriented HPC markets, and will be available in the second half of 2006.
The technologies from IBM and ClearSpeed are components of the recently announced advanced supercomputer architecture that the University of Bristol has designed to consolidate its position as one of the world's top HPC centres.
www.clearspeed.com