I hadn’t fully appreciated the significance of ARM’s collaboration with Xilinx in making a version of its AMBA on-chip bus which is optimised for FPGAs.
The latest release of Xilinx’s ISE Design Suite 12 software holds the clue to the scope of the FPGA supplier’s work with ARM on an optimised version of the AMBA bus known as AXI-4.
Aside from Xilinx’s plans for embedding an ARM processor in its FPGAs, the programmable logic firm is standardising on-chip interfaces on the open ABMA 4 AXI4 interconnect protocol.
The real importance of the AMBA on-chip bus to the FPGA firm became clear with the announcement this month of the 7 series product families from Xilinx.
According to Xilinx, the unified architecture on which 7 series FPGA families are based was “facilitated by adoption of the AMBA AXI interconnect standard enabling plug-and-play IP usage”.
Xilinx’s interest in the AMBA AXI4 interconnect protocol is far more basic than just supporting the integrated of ARM Cortex processor cores into future FPGAs.
First implemented in the firm’s Virtex 6 devices, it has been used to reshape the interconnect architecture of its future FPGAs.
Xilinx also worked with ARM to define the AXI4, AXI4-Lite, and AXI4-Stream specifications for efficient mapping into its FPGA architectures.
The clue was in the FPGA firm’s latest release of its ISE design tools last month.
For the first time, ISE design tools deliver ‘intelligent’ clock-gating technology that reduces dynamic power consumption by as much as 30 percent.
The tool provides AMBA 4 AXI4-complaint IP support for plug-and-play design.
It also sits at the heart of Xilinx’s plans to widen design support for 4th generation partial reconfiguration.
Xilinx has worked with ARM for over a year to allow the programmable logic elements of the FPGA, with their highly parallel architecture, to be closely coupled with the processor system through the AMBA-AXI on-chip bus.
However, the main attraction of AXI4 for Xilinx is the open nature of the bus protocol which brings big benefits when it comes to expanding the variety of IP available for FPGAs.
As I said – 7 series, partial configuration, and IP – there seems to be more to Xilinx’s love affair with AMBA than just ARM cores.
See: Xilinx aims to break the mould with Virtex 7