Semiconductor Manufacturing International Corporation (SMIC) says it has completed the production of first wafers on its 45nm GP generic process.
A feature of this process is that it integrates a silicon germanium stress module into the design to improve speed.
The 45nm GP technology is the result of a CMOS process agreement with IBM.
According to Dr. Robert Tsu, SMIC's 45nm project leader: "Integrating the silicon germanium process and achieving a well-yielded test chip from the very first yield lot is a significant technical accomplishment, and these accomplishments allow SMIC to provide a highly manufacturable technology to our customers."
SMIC's 45nm GP technology is supported by a proven design-in SPICE model and in-house design IP capability that enables customers to begin prototype product design and plan for early time-to-market.
SMIC has said that the 45nm process node is the major focus for it as it looks to expand its business outside China. In June, SMIC announced the adoption of new SPICE model software for the design and verification of 45nm IP blocks, I/O circuitry, and standard cell characterization flows.
"This 45nm GP process is a proven, robust, high yielding, and high performance technology that we anticipate can not only deliver better performance, reliability, and cost to our valued customers, but also help SMIC become even more competitive in China and worldwide," said Dr. Richard Chang, SMIC's President and CEO.