Established FPGA companies are saying that a raft of new FPGA start-ups coming into the industry have little chance of success.
Recent entrants to the sector include Achronix, Cswitch, Mathstar and Velogix. What the start-ups have in common is they are targeting the high-performance end of the FPGA market.
“If there is a market for very high speed designs, I’d like to know about it. High speed is a small percentage of total sales,” Wim Roelandts, CEO of FPGA market leader Xilinx, told EW.
One problem for the start-ups is place and route tooling. “There is no third party place and route software,” said Roelandts, adding, “the place and route software at Xilinx runs to 20 million lines of code.”
“For place and route, the tools have to come from us,” concedes Yousef Khalilollahi of Achronix. “We need to develop that, and put it in the hands of customers. Having a familiar architecture like ours allows you to buy existing place and route tools, and modify them to fit the architecture.”
Another problem for the start-ups is obtaining IP. “Half of a Virtex 5 is an Asic, and half is an FPGA,” points out Roelandts. “More and more we’re saying: ‘This is a framer’, or ‘This is for digital compression’, it’s no longer just silicon.”
However, Khalilollahi responded: “IP vendors have to modify Asic IP for current FPGAs because current FPGA performance is so much worse than Asic performance, but our performance meets and exceeds Asic performance, so we don’t burden them with the need to modify their IP. You just plug in the Asic RTL code.”
A third problem for the start-ups is process. “None of them is shipping 65nm but, by the time they are out with 65nm, we’ll be out with 45nm,” said Roelandts.