Mannerisms

Against all the odds, a rash of new FPGA start-ups have appeared, among them Achronix, C-Switch, MathStar and Velogix.

Why is it against the odds? Four reasons:

The 25 year-old FPGA market is seen as settled into a two-horse affair with Altera and Xilinx owning over 80 per cent of the market and their much smaller rivals Actel, Lattice and Quicklogic with single figure market shares.

It is too expensive for a start-up to develop the tools.

No one will develop IP for start-ups’ architectures.

Everyone else who’s tried FPGA has failed including Intel, Toshiba, Texas Instruments, IBM, Motorola (now Freescale), NEC, Philips (now NXP), AMD, Agere.

“Getting into the programmable logic business now means you’re going to be 20 years behind the leaders,” says John East, CEO of Actel, “no matter how many engineers you have, you still don’t have 20 years of experience, 20 years of orders, and 20 years of understanding what’s good and what’s not good.”

Nonetheless, the newcomers are here. “There’s more FPGA start-ups now than there’s been in decades because of the market fragmentation”, says Andy Haines of Synplicity which develops design and verification tools for FPGAs

“We’ve had conversations with a number of FPGA start-ups which are all in stealth mode. There’s a lot bubbling under the surface”, says Jim Tully of analysts Gartner Dataquest.

The market fragmentation referred to by Andy Haines, occurred because of the power density ceiling imposed by the physical limitations of 65nm processing.

These limitations encouraged Xilinx and Altera to adopt different product variations for their Virtex-5 and Stratix-3 product families, with each variation optimised for particular application areas e.g. low power or high performance, rather than having a one-size-fits-all FPGA family at each node.

That’s why the start-ups have mostly gone for high-performance FPGAs. Achronix has an FPGA which runs at 2GHz on 90nm, four to five times faster than Xilinx’s fastest part; MathStar, has a product it calls FPOA (Field Programmable Object Arrays) running at up to 1GHz; C-Switch is targeting telecoms applications and Velogix is also targeting high performance FPGA.

They seem to have one thing in common, they believe that FGA is a silicon play, not a software play.

When Rahul Sud, the founding CEO of Lattice Semiconductor, tried to get STMicroelectronics into the FPGA business with a product called GOSPL, he would say: “What are the three priorities in the real estate business? Location, location, location; what are the three priorities in FPGA? Software, software and software”.

While that remained the case, the established companies, with a couple of decades each of de-bugged, tried and tested software behind them, had a significant advantage over any upstarts.

Now, the upstarts reckon that the market fragmentation, combined with available third party commercial software gives them their opportunity.

For synthesis, Yousef Khalilollahi of Achronix reckons there is enough commercially available third party software. “Our plan is to have a very familiar architecture so the design can map to the silicon as if mapping to existing architectures which have been in the market for a long time. So long as you’re not innovating on architecture you can plug into existing tools, and people want to plug into existing tools”, says Khalilollahi.

“For place and route, the tools have to come from us”, says Khalilollahi, “we need to develop that, and put it in the hands of customers. Having a familiar architecture allows you to buy existing place and route tools, and modify them to fit the architecture, so long as the architecture is not so much out of whack with existing architectures.”

Getting IP for the Achronix cores will not be a problem, reckons the company, because ASIC IP will fit Achronix FPGAs.

“IP vendors have to modify ASIC IP for current FPGAs because current FPGA performance is so much worse than ASIC performance,” says Khalilollahi, “but our performance meets and exceeds ASIC performance, so we don’t burden them with the need to modify their IP. You just plug in the ASIC RTL code.”

If Achronix and the other start-ups succeed in demonstrating that there is enough commercially available FPGA design and place and route software available to allow FPGA start-ups to succeed, then the FPGA business could become a more silicon-centric rather than the software-centric business as it is today.

And that would hugely help the customers of the FPGA industry. If FPGAs become a silicon play, then the focus of the FPGA industry would be on architectural innovation.

The best chip would win, and it would be subject to Moore’s Law pricing.

We might have less power hungry and cheaper FPGAs. How good would that be?