If ever there was a case for not giving up pursuing basic process R&D, as NXP, Freescale and STMicroelectronics have said they will do, it is the recent announcement of Fujitsu’s success in reducing leakage current at 45nm.
It may have something to do with the fact that Fujitsu’s chip business is headed up by a former process engineer, Toshihiko Ono, while most of the world’s top semiconductor companies are now headed up by marketing guys.
Ono, much more than any marketing guy, will realise how process excellence can be a vital competitive differentiator in an SOC.
At 45nm, Fujitsu appears to have pulled off something of a coup in terms of leakage. “Compared to previous 45nm technologies on record, the new platform reduces the leakage current that occurs when current is wasted in wait states to one-fifth that of previous levels and reduces interconnect-induced lag times by approximately 14 per cent,” claims Fujitsu.
With so many of its competitors trotting along to the various process development consortia to get a 45nm process which will be exactly the same as everyone else’s 45nm process, Fujitsu now looks like being able to boast a significant, and unmatchable, advantage over its competitors in an area, leakage, which has become probably the most critical factor in a chip’s eventual performance.
Process always used to be an important competitive differentiator, and semiconductor companies would advertise the characteristics of their processes.
The marketing men may yet come to regret their decision that process excellence has become irrelevant.
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