Mannerisms

Rahul Sud, former Inmos chip designer, and the founding president of Lattice Semiconductor, now General Partner at venture capitalists Silicon Capital, has come up with a new industry business model.

Silicon Capital has backed a new company called Logic Fab. "I foresee Logic Fab as the world's first design fab. I suspect that, much like the foundry industry, other design fabs will come up," says Sud.

Sud's premise is that the foundry industry restructured the industry's business models when the cost of fab reached $500 million. It was an inflexion point which was unaffordable.

"A re-structuring was necessary for the industry to grow", argues Sud, similarly the industry is now at an inflexion point in SOC design and verification cost. The industry has no choice, but to re-structure its business models again. And I foresee the birth of a new member of the semiconductor value chain namely the Design Fab, much like the foundry became a new member of the value chain in 1987."

Design cost became unsustainable when the number of engineers required in the 80s for designing a complex SOC, went up by 40 times, from five in the 80s, to about 200 today, of which 100 are software and 70 are doing verification. That has to be multiplied by 2.5 times to reflect the 2.5 years required to design a chip today, compared to six months in the 1980s. So costs can reach $50m to $100m depending on complexity.

"The transformation of a fixed cost for a variable cost is the same for a design fab as it was for a foundry", says Sud, "most fabs are full of equipment; my fab is full of brains."