Before 45nm generation wafers are hot from the furnaces, the consortia for the 32nm generation are gearing up for commercial introduction around the end of the decade.
TSMC is said to have over 200 engineers developing the 32nm process with a view to launching the node in Q4 2009. Sometime between now and then, it will launch a half-node 40nm process.
Meanwhile, memory makers Hynix, Elpida, Micron, Qimonda and Samsung, combine with NXP, Intel, Matsushita, STMicroelectronics, Infineon, Texas Instruments and TSMC to work with IMEC on 32nm.
Also with a 2009 timeframe in mind, Samsung Electronics, Chartered Semiconductor and IBM (called the 'common platform' partners) along with Infineon Technologies and Freescale Semiconductor (called the 'joint-development' partners) will be developing 32nm processes at IBM's facilities in East Fishkill, New York.
The East Fishkill five, the IMEC group and TSMC will work on processes using ultra low-k dielectrics, high-k, metal gates, strained silicon and second-generation immersion lithography technology.
The IBM group is also working on a bulk CMOS 32nm process. The group intends to begin 32nm product qualification by year-end 2009, while common platform partners, Chartered and Samsung are looking to start 32nm production in Q1 2010.
TOMORROW MORNING: TEN SILLIEST APPLICATIONS
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