Every now then it’s good to be gob-smacked, and one of the great things which EDA leader Synopsys brings to the semiconductor industry, besides its peerless design tools of course, is a tracking analysis for the new technologies, which frequently comes up with some gob-smacking statistics.
It has just done so again. “We track all the advanced designs in the world”, says Aart de Geus, CEO of Synopsys, and, according to de Geus, people have already started on 32nm designs.
It seems amazing that the industry has been scaling so quickly when, not so long ago, the after-shocks of the awful 0.13 micron node and the ghastly spectre of leakage at the 90nm node, threatened to stall the industry’s progress.
Not only is Synopsys involved in five 32nm designs, it is doing early work on 22nm, according to de Geus, while rival Wally Rhines, CEO of Mentor Graphics, says he’s involved with ‘four or five’ 32nm designs.
At Chartered Semiconductor, which is part of IBM’s ‘Common Platform’ programme with Infineon, Samsung and STMicroelectronics in which the partners share design rules, processes and macros, vice president Kevin Meyer says they are involved with five 32nm designs.
They could very well be the same five as Rhines and de Geus are involved in.
Meanwhile, according to Synopsys, the number of 45nm designs has now reached 73 and the number of 65nm designs has reached 488, with 241 65nm tape-outs.
It looks as if the rate of process innovation is speeding up again, and that has to be good news for prices and profitability.
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