The semiconductor industry used to be about strokes of genius, stunning flashes of innovation and huge technological breakthroughs but today's reality is that it's about making a profit and keeping costs down.
STMicroelectronics appears to be following the example of the greatest innovator of them all, Thomas Edison, who reckoned: "Genius is one per cent inspiration and ninety nine per cent perspiration".
Recently ST showed just how much work it puts into reducing its cost base and it's an awesome insight.
"We're simplifying and optimising our manufacturing machine", says CEO Carlo Bozotti, "we had 25 manufacturing sires. We're decreasing that by ten."
In terms of fabs, the decrease is dramatic. "In 2005, ST had 17 fabs. Today it has ten. By the middle of next year it will have eight. We have reduced the capital intensity and increased foundry usage", says ST's COO, Alain Dutheil
"On completion of the current restructuring initiative, ST will have saved $150 million a year in manufacturing costs", adds Dutheil.
Between 2006 and 2007, 'low double-digit' wafer cost reduction was achieved, and in the next three quarters of its financial year 2008, ST expects a further 'high single digit' wafer cost reduction.
By increasing the use of foundries, by using partnerships and manufacturing joint ventures, and by the continual rationalising of manufacturing operations ST has been reducing it capex-to-sales ratio.
In 1995 to 2004 the capex-to-sales ratio was 26 per cent. This was brought down to 16 per cent between 2005 and 2006 and reached 11.4 per cent last year and is estimated to reach 10 per cent this year.
The use of foundries has been a key constituent of the reduction in costs. The total number of wafers outsourced was five per cent in Q107, and seven per cent in Q108. Next year the percentage of wafers outsourced is estimated to be between 12 and 15 per cent and, in 2010, outsourcing will account for 20 per cent.
R&D investment has increased steadily from $400 million in Q106 to around $490 million in Q108. Helping bring that down is the collaboration with IBM on core CMOS processes in the
According to Carl Ferro, ST's CFO, "Were looking for a return on net assets (RONA) of 12 to 20 per cent, and to generate cash flow, and distribute a substantial portion of it to the shareholders."
ST's RONA was 10.7 per cent, not counting its flash business, in 2007, and the net operating cash flow was $840million.
"We have the most competitive tax situation in the industry with an effective tax rate of 13-16 per cent compared to 27 per cent average for competitors. Represents two points of EBITDA", says Ferro.
Edison would probably have approved.