GEC-Plessey Semiconductors Moves To Half Micron Process

"We got everything we asked for", Tom Urwin, managing director at GPS told Electronics Weekly.

Urwin believes that Weinstock has accepted that semiconductors could become strategically important to the GEC group.

"Semiconductors do have a very big role to play in the businesses they (GEC) could be in," added Urwin.

Ernie Pusey, sales and marketing director, was quick to put the investment in a national context.

"It is a very important day. It secures microelectronics manufacturing in the UK for the next five years at least", said Pusey,

The money will be spent in the company's wafer fab at Roborough, Plymouth. Currently producing CMOS Asics on six inch wafers with 0.7-micron process technology, Urwin's plan is to immediately start upgrading Roborough, effectively doubling capacity with the equivalent of a new 16,000 square feet Class 1 clean room facility.

According to Urwin that will take eight months when GPS' first 8 inch wafer processing equipment will be installed. A 0.5 -micron development line will be moved into the new fab next summer and the first 0.5- micron Asics should be produced by the end of 1995. "Certainly within a year", said Urwin, who is quick to mention plans to move Roborough to 0.35- micron in 1996.

"I haven't targeted a start date for 0.35- micron development, certainly next year with production in the second half of 1996", said Urwin.

Urwin even mentions the prospect of 0.25-micron process, although he points out that will take further investment.

"The exact time (of 0.25- micron) isn't the biggest problem today. It's important that we don't run out of steam at 0.35-micron," added Urwin.

Within two years GPS, which exports over 70 per cent of the semiconductors it makes in Britain, should be moving its CMOS lines to 0.35-micron, if so it will have almost caught up with the rest of the market. SGS-Thomson Microelectronics, one of Europe's leading Asic vendors, already has 0.5- micron Asics in production and will move to 0.35-micron in 1995.

Before last week's £100m investment GPS was in danger of falling too far behind the process technology of its Asic rivals. And this had already started to worry Urwin and his management team.

"We will survive because we have an intimate knowledge of manufacturing technology. Without that, chances are we would not be at the leading edge", said Urwin.

According to Pusey 0.5 micron will extend gate counts up to 100,000 gates. GPS is also weighing up whether it needs to add a non-volatile flash memory cell to its library.

CMOS Asics largely for high growth markets such as mobile communications, paging, computer peripherals and wireless LANs make up half of GPS' sales. The other half consists of the company's high speed silicon bipolar ICs.

"Both areas are growing remarkably well", said Urwin, "in time we probably will see more CMOS but it is difficult to predict."

GPS is currently working very close to its capacity on CMOS devices. So much so that Urwin, soon after joining the company in August 1993, negotiated a foundry deal with Taiwan Semiconductor Manufacturing Company (TSMC). He expects to continue to use foundries for some of the non-leading edge products and he is already talking to a second unnamed foundry.

"The goal is to put between 20 and 40 per cent of CMOS production in a foundry," said Urwin.

Bipolar is the one technology which Urwin has no plans to farm out to a foundry, indeed he would have difficulty finding one to match GPS' own capability.

The company's 0.5- micron bipolar process, known as the HG process, will move into production next year. HG offers the 25GHz transistors, which are necessary for the noise performance in 2GHz designs for DECT and DCS1800 mobile phones.

Significantly Urwin will move the HG bipolar production from its traditional home in Swindon to Roborough where it will make use of the new Class 1 clean areas.

There are also plans, a little vague at present, to combine the bipolar capability with the new 0.5 micron CMOS circuits.

"Everyone is talking about BiCMOS and it seems a natural thing for us to do," said Urwin, "we'll have a BiCMOS capability in Roborough in 1996."

However Urwin is not convinced that GPS will opt for a traditional BiCMOS process. He favours a variant which he calls: "analogue CMOS, CMOS with capacitors which continues to move into the area covered by BiCMOS",  Urwin added.

And Urwin is even looking to the process technology which will take GPS beyond current bipolar performance. "We could well be using silicon-germanium beyond HG," said Urwin, though he adds, "but my engineers will kill me for saying that."