This week sees another contender enter the ring for the emerging 3D FPGA market tussle. TierLogic will reveal on Wednesday what it has been working on in stealth mode since 2003.
Like others in the 3D FPGA market, TierLogic's focus is to site the configuration logic in a way that doesn't diminish the density of the logic array or affect the performance of the chip.
Another 3D FPGA company with a similar approach is NuPGA which says it buries the programming transistors in a foundation layer under the logic array.
Another self-styled 3D FPGA company is Tabula which uses the well-understood technique of dynamic re-configurability at sufficient speed to enable logic elements to be re-used in the same circuit. Can this be called 3D? Well Tabula rather cheekily takes the third dimension as being Time.
Other approaches to 3D FPGA use bonded wafers connected with internal vias - the kind of approach in which Tezzaron Semiconductor specialises.
The motivation for looking for new approaches to FPGA is the escalating cost - for diminishing benefits - of following
TierLogic is keeping schtumm until Wednesday but I did manage to elicit the gritted-teeth-sounding comment: "The Third Dimension Is Space not Time."
What do you mean my teeth were gritted? It was just a big California-style smile...
Poetic licence, Paul, to stoke up the tension before the curtain rises.
3D seems to be old hat already. Try reading this one on 4D FPGAs with a straight face !! :-)
http://www.techfocusmedia.net/fpgajournal/feature_articles/20100330-4d/?utm_source=FPGA+Journal+Update&utm_medium=email&utm_campaign=FPGAJ+20100330&utm_content=mbryant%40futurehorizons.com
Thanks for the 4D FPGA piece, Mike, sounds to me like very high quality bollox. They should have announced it today!