Mannerisms

Against all the odds, a rash of new FPGA start-ups have appeared, among them Achronix, C-Switch, MathStar and Velogix.

Why is it against the odds? Four reasons:

The 25 year-old FPGA market is seen as settled into a two-horse affair with Altera and Xilinx owning over 80 per cent of the market and their much smaller rivals Actel, Lattice and Quicklogic with single figure market shares.

It is too expensive for a start-up to develop the tools.

No one will develop IP for start-ups’ architectures.

Everyone else who’s tried FPGA has failed including Intel, Toshiba, Texas Instruments, IBM, Motorola (now Freescale), NEC, Philips (now NXP), AMD, Agere.

“Getting into the programmable logic business now means you’re going to be 20 years behind the leaders,” says John East, CEO of Actel, “no matter how many engineers you have, you still don’t have 20 years of experience, 20 years of orders, and 20 years of understanding what’s good and what’s not good.”

Nonetheless, the newcomers are here. “There’s more FPGA start-ups now than there’s been in decades because of the market fragmentation”, says Andy Haines of Synplicity which develops design and verification tools for FPGAs

“We’ve had conversations with a number of FPGA start-ups which are all in stealth mode. There’s a lot bubbling under the surface”, says Jim Tully of analysts Gartner Dataquest.

The market fragmentation referred to by Andy Haines, occurred because of the power density ceiling imposed by the physical limitations of 65nm processing.

These limitations encouraged Xilinx and Altera to adopt different product variations for their Virtex-5 and Stratix-3 product families, with each variation optimised for particular application areas e.g. low power or high performance, rather than having a one-size-fits-all FPGA family at each node.

That’s why the start-ups have mostly gone for high-performance FPGAs. Achronix has an FPGA which runs at 2GHz on 90nm, four to five times faster than Xilinx’s fastest part; MathStar, has a product it calls FPOA (Field Programmable Object Arrays) running at up to 1GHz; C-Switch is targeting telecoms applications and Velogix is also targeting high performance FPGA.

They seem to have one thing in common, they believe that FGA is a silicon play, not a software play.

When Rahul Sud, the founding CEO of Lattice Semiconductor, tried to get STMicroelectronics into the FPGA business with a product called GOSPL, he would say: “What are the three priorities in the real estate business? Location, location, location; what are the three priorities in FPGA? Software, software and software”.

While that remained the case, the established companies, with a couple of decades each of de-bugged, tried and tested software behind them, had a significant advantage over any upstarts.

Now, the upstarts reckon that the market fragmentation, combined with available third party commercial software gives them their opportunity.

For synthesis, Yousef Khalilollahi of Achronix reckons there is enough commercially available third party software. “Our plan is to have a very familiar architecture so the design can map to the silicon as if mapping to existing architectures which have been in the market for a long time. So long as you’re not innovating on architecture you can plug into existing tools, and people want to plug into existing tools”, says Khalilollahi.

“For place and route, the tools have to come from us”, says Khalilollahi, “we need to develop that, and put it in the hands of customers. Having a familiar architecture allows you to buy existing place and route tools, and modify them to fit the architecture, so long as the architecture is not so much out of whack with existing architectures.”

Getting IP for the Achronix cores will not be a problem, reckons the company, because ASIC IP will fit Achronix FPGAs.

“IP vendors have to modify ASIC IP for current FPGAs because current FPGA performance is so much worse than ASIC performance,” says Khalilollahi, “but our performance meets and exceeds ASIC performance, so we don’t burden them with the need to modify their IP. You just plug in the ASIC RTL code.”

If Achronix and the other start-ups succeed in demonstrating that there is enough commercially available FPGA design and place and route software available to allow FPGA start-ups to succeed, then the FPGA business could become a more silicon-centric rather than the software-centric business as it is today.

And that would hugely help the customers of the FPGA industry. If FPGAs become a silicon play, then the focus of the FPGA industry would be on architectural innovation.

The best chip would win, and it would be subject to Moore’s Law pricing.

We might have less power hungry and cheaper FPGAs. How good would that be?

One CEO who won’t be entertaining the private equity guys is Wim Roelandts, CEO of Xilinx.

After private equity companies bought both NXP and Freescale in deals worth $11bn and $17bn respectively, it seems that the semiconductor industry has become a target of these people. But Roelandts will be strongly resisting that fate for Xilinx.

“Private equity buy-outs are a scheme for a few people to get rich quickly”, says Roelandts, “they’re not looking at the strategic direction of a company. They buy a company, leverage the hell out of it, sell bits and pieces, cut the R&D spending and go public to get their money back.”

“Whatever they say about returning value to the shareholders, what they’re really doing is putting value into their own pockets.”

“I could make Xilinx very profitable by cutting out the R&D and it would have no effect on the company for a couple of years”, said Roelandts.

Why does he think these people are targeting chip companies? “First they have a herd mentality, like VCs”, replies Roelandts, “second, a lot of people see semiconductors as a more mature industry. I think they’re wrong. I think there are still upcycles and downcycles and if you have a downcycle in the semiconductor industry, these investments are going to look very foolish.”

The private equity purchasers of NXP and Freescale are claiming that they made their acquisitions at the bottom of the cycle. Roelandts disagrees: “If anything we are probably at the top of the cycle”, he says, “people are talking about a downturn in 2007/2008.”

Can this new bunch of FPGA start-ups succeed where so many have failed? Not if you believe the Big Boys.

What the start-ups like Achronix, Cswitch, Mathstar, Velogix etc have in common is they are targeting the high-performance end of the FPGA market.

“If there is a market for very high speed designs, I’d like to know about it. High speed is a small percentage of total sales,” says Wim Roelandts, CEO of Xilinx which currently has a 53 per cent market share in FPGA and therefore has something considerable to protect.

“There is no third party place and route software”, says Roelandts who helpfully points out: “The place and route software at Xilinx runs to 20m lines of code.”

Yousef Khalilollahi of Achronix, recognizes that: “We need to develop that” and adds: “Having a familiar architecture like ours allows you to buy existing place and route tools, and modify them to fit the architecture.”

Another problem for the start-ups is obtaining IP. “Half of a Virtex 5 is an ASIC, and half is an FPGA, it’s no longer just silicon”, points out Roelandts.

Khalilollahi responds: “IP vendors have to modify ASIC IP for current FPGAs because current FPGA performance is so much worse than ASIC performance, but our performance meets and exceeds ASIC performance, so we don’t burden them with the need to modify their IP. You just plug in the ASIC RTL code.”

A third problem for the start-ups is process. . “None of them is shipping 65nm but, by the time they are out with 65nm, we’ll be out with 45nm,” said Roelandts.

A more comprehensive demolition of the FPGA start-ups ambitions comes from John East, CEO of Actel: “Getting into the programmable logic business now means you’re going to be 20 years behind the leaders,” he says “no matter how many engineers you have, you still don’t have 20 years of experience, 20 years of orders, and 20 years of understanding what’s good and what’s not good.”

There is, of course, a long list of Johnny-come-latelys which tried and failed: Intel, Toshiba, Texas Instruments, IBM, Motorola (now Freescale), NEC, Philips (now NXP), AMD, Agere.

FPGA start-up MathStar, and Picochip which has an alternative technology to FPGA, have joined in the debate about whether FPGA start-ups, like Achronix, MathStar, Velogix and Cswitch, and alternative technologies like Picochip’s, can succeed.

A lot of things will change at the 45nm process node, but Xilinx intends to be a very early user of the technology for its FPGAs.

There's an eighteen month to two year gap between the adoption of 65nm at Xilinx and Altera. How can the two leading foundries can be so far apart?

Can start-up MathStar take on the 300lb gorillas Xilinx and Altera in the programmable logic market by changing the power/performance paradigm?

What will be the effect of the expiration of some of the fundamental programmable logic patents?

Was TSMC to blame, or was it Altera? Both companies have kept very quiet about the hiccup last May which caused Altera to issue a statement saying they would not be in production of their Stratix III 65nm chips until 2008.

Today that changes with Altera announcing it is sampling 65nm chips. Not Stratix, the high performance family, but Cyclone, the low power family. It means that Altera has got to 65nm half ayear earlier than it expected when it made that announcement back in May 2006.

MathStar http://www.mathstar.com is making in the running in the new high-performance (i.e. above 1GHz) FPGA area being developed by start-ups like Achronix and Cswitch.

XMOS, the semiconductor industry's most intriguing start-up, is expected to launch on Monday with a statement of its intentions, a description of its initial products and a compelling proposition for the consumer electronics industry.

On December 1st last year we did a post called: 'FPGA Industry On The Wrong Track. It argued that the FPGA industry is becoming more like the SOC business with products targeted for specific applications instead of relying on its essential strength - flexibility and programmability. Moreover that the FPGA industry isn't tackling its two major problems: that its products are too expensive and use too much power.

As the programmable logic manufacturers stew in their $3.6 billion niche, a few brave souls are trying to solve the two key problems which have always plagued programmable logic products: they cost too much; they use too much power.