Recently in FPGA Category

Although they are friends, the CEOs of Altera and Xilinx preside over one of the keenest rivalries in the semiconductor industry.

The programmable logic market first hit $3 billion in 2000, and it didn't make $4 billion until 2010, according to Ed Lepkowski of L-Mar Associates.

Why on earth has Intel decided to fab Achronix FPGAs?

So what's with Actel-Microsemi?

It's good to see innovation taking place in programmables. This is a product area which has remained stuck in a $3 billion market niche for a decade. Silicon Valley start-up TierLogic today announces a route to bringing down programmables' costs which may kick-start growth in the sector.

This week sees another contender enter the ring for the emerging 3D FPGA market tussle. TierLogic will reveal on Wednesday what it has been working on in stealth mode since 2003.

FPGA start-up Tier Logic, currently beavering away in Stealth Mode in Santa Clara, has reassured its IC designers that their jobs won't be relocated to exotic, Far Eastern climes.

The problem for the FPGA companies is  growth. They've been stuck in a $3 billion niche since the year 2000 and the only significant progress for their products has been shrinking geometries and adding blocks.

As the programmable logic manufacturers stew in their $3.6 billion niche, a few brave souls are trying to solve the two key problems which have always plagued programmable logic products: they cost too much; they use too much power.

On December 1st last year we did a post called: 'FPGA Industry On The Wrong Track. It argued that the FPGA industry is becoming more like the SOC business with products targeted for specific applications instead of relying on its essential strength - flexibility and programmability. Moreover that the FPGA industry isn't tackling its two major problems: that its products are too expensive and use too much power.

XMOS, the semiconductor industry's most intriguing start-up, is expected to launch on Monday with a statement of its intentions, a description of its initial products and a compelling proposition for the consumer electronics industry.

MathStar http://www.mathstar.com is making in the running in the new high-performance (i.e. above 1GHz) FPGA area being developed by start-ups like Achronix and Cswitch.

Was TSMC to blame, or was it Altera? Both companies have kept very quiet about the hiccup last May which caused Altera to issue a statement saying they would not be in production of their Stratix III 65nm chips until 2008.

Today that changes with Altera announcing it is sampling 65nm chips. Not Stratix, the high performance family, but Cyclone, the low power family. It means that Altera has got to 65nm half ayear earlier than it expected when it made that announcement back in May 2006.

What will be the effect of the expiration of some of the fundamental programmable logic patents?

Can start-up MathStar take on the 300lb gorillas Xilinx and Altera in the programmable logic market by changing the power/performance paradigm?

There's an eighteen month to two year gap between the adoption of 65nm at Xilinx and Altera. How can the two leading foundries can be so far apart?