FPGA companies are dutifully keeping pace with Moore's Law. Every year, we get faster, larger devices and the pundits regularly predict FPGA's are nearing the point where they can steal market share from ASIC and ASSP companies. But it never happens. ASIC starts continue to drop, but it is the ASSP companies that seem to be benefiting from that market shift. Isn't that curious?
Consider a few insightful words from Lewis Carroll's Through the Looking Glass.
"Well, in our country," said Alice, still panting a little, "you'd generally get to somewhere else -- if you run very fast for a long time, as we've been doing."
"A slow sort of country!" said the Queen. "Now, here, you see, it takes all the running you can do, to keep in the same place. If you want to get somewhere else, you must run at least twice as fast as that!"
The Queen is right: keeping up with Moore's Law gets you exactly where you are today. The fundamental problem lies with the growing need for IP, so completely vital to any serious design today. And not only is the number of IP instances per device growing, but also the size of each IP. Gains in device capacity are quickly consumed by the increased needs of new, higher complexity IP.
I believe the the future offers three scenarios:
• If FPGA's can keep pace with the growth of IP complexity, then the current status quo will be maintained
• If FPGA's can grow faster than IP complexity, there is a real chance to post significant market gains as a viable alternative to ASIC
• If FPGA's grow slower than IP complexity, then FPGA's could be moving towards technical oblivion
So what advice should we give Alice? Run faster.
