Boundary scan takes its place at Embedded Live

The JTAG/boundary-scan test and programming tools have traditionally been seen as costly and complex to implement.

As a result, much of their use to date has been limited to the testing or programming of boards on the production line.

This is an outdated view and is at odds with what test system suppliers are offering in the JTAG/boundary scan market.  

The cost of implementing boundary scan is falling.

An example is how JTAG/boundary scan is being used in a semiconductor design environment comes from King's Langley-based processor IP developer Imagination Technologies.

The chip firm is using a boundary scan system supplied by XJTAG, which will be exhibiting at Embedded Live, in the development of system-on-chip (SoC) devices for the mobile phone and in-car electronics markets.

Typically, these designs feature high I/O interconnect density with complex FPGAs and many signals running on internal layers that could not be probed.

"We recognised the need to move from socket-based testing to a boundary scan-based system," says Mark Dunn, v-p engineering in Imagination Technologies' IMGworks group.
Imagination Technologies is using the XJTAG boundary scan tool to test and debug prototypes, test ¬assemblies and customer development boards.

"It has much greater functionality than we expected and we can test memory interfaces and non-JTAG components well beyond the scan chain - making the system very flexible for debugging in the laboratory," says Dunn.