The Energy Micro EFM32 and ARM Cortex-A15 attack very different parts of the embedded-systems market but they have considerable similarities in the way that their developers attack the problem of power consumption, as two recent overview articles at EETimes Designline show. The secret is in what the processors don't run.
Rasmus Christian Larsen of Energy Micro describes the thinking behind the Lesense interrupt-processing unit in the company's latest generation of microcontrollers. The whole idea behind the design of the unit is to make it possible to keep the Cortex-M3 processor core sleeping for longer. The unit has its own state machine that can perform a number of I/O operations autonomously before the M3 has to get involved. This can help, as Larsen describes, with the implementation of capacitive touchscreen which are now de rigeur in a lot of systems and not just the smartphones that the A15 is aimed at.
Peter Greenhaigh of ARM, in the meantime, expands on ARM's recent announcement of its "big-little" approach. Instead of offloading work to a simple state machine, this uses a simpler but binary compatible processor that is optimised for power savings rather than clock speed and instruction throughput. But again, the idea is that the A15 will spend much of its expected lifetime sleeping heavily, only being woken to crunch through video or gameplay.
The initial launch was light on detail. Greenhaigh goes into a little more detail on how long it takes to migrate tasks from one processor to the other and its impact on cache management - the cache of the processor that is about to be powered down stays on for a while so that it can be snooped by the awakening processor until all the necessary cache lines have been copied over and the cache itself can finally be put to sleep.
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