ST To Run 28nm FD-SOI NovaThor Next Week

Next week STMicroelectronics will start running the 28nm FD-SOI NovaThor integrated modem and applications processor designed by ST-Ericsson, Jean-Marc Chery, Chief Manufacturing and Technology Officer of ST told me in Crolles yesterday.

The chips will be made at Crolles. The Crolles 28nm FD-SOI line has capacity for 300-500 wafers per week. The process is in the course of being transferred to Globalfoundries’ Dresden fab where it will be ready for mass production in the second half of 2013, said Chery.

The decision to go with FD-SOI was taken in July 2011 after an earlier decision to use bulk

“28nm bulk with HKMG looked good enough to address smartphones,” said Chery, “over a year ago we taped out HKMG 28nm at Samsung.”

Having made the decision to adopt FD-SOI last July, it has taken a year to get the process to the point where it will be ready to start running 28nm FD-SOI ICs next week.

The 28nm FD-SOI process produces ICs with superior performance to Intel’s bulk 22nm finfet process, said Chery.

“Finfet generation 1 on bulk does not perform as well as SOI performance at 28nm,” said Chery, “finfet generation 1 has good leakage without performance or performance with high leakage.”

Chery reckons the Intel 22nm process is really a 26nm process measured by drawn gate length.

“Finfet generation 1 is a complex technology and doesn’t give the best trade-off between performance and leakage,” said Chery.

The FD-SOI process will see ST through the 28nm and 20nm nodes without ST having to bother with finfets.

“At 28nm and 20nm we can offer a planar SOI solution which offers the best combination of performance and leakage,” said Chery

The FD-SOI vs finfet competitive battle will be joined in earnest at the 14nm node, reckons Chery.

“Intel’s 14nm finfet process will be fantastic,” said Chery, “so Samsung and TSMC are running fast to introduce a competitive 14nm finfet process.”

ST’s FD-SOI process will scale to 14nm but, after that, ST is looking for partners to develop the technology further.

“The challenge for us will be at 10nm,” said Chery, “because bulk will disappear at 10nm. We need to get others to join the club at Globalfoundries – it’s in our interest to prepare a club for 10nm.”

Chery reckons the FPGA people and the ARM camp could be possible members.



  1. @ Scunnerous : I totally agree that SOI was useful back then for solving the leakage problem but that’s a long time ago now and design techniques have moved on. I also think AMD tended to think SOI was their magic bullet and not the excellent lean and mean R&D teams the company had assembled. Even now AMD produces innovative designs which get far more out of any process node than Intel manage.
    For FD-SOI the hardest part has been moved to the wafer supplier. Soitec state that they have solved the problems and can ship product with top layer uniformity good enough for 22nm FD-SOI. FD-SOI is an elegant solution at 28nm and 22nm but hits problems at 14nm. However its best application is for mobile devices rather than MPUs where bulk is now more cost effective.

  2. Nay, on time, with qualcomm. Oh, just wait a second; what about this:

  3. Mike, AMD’s PD-SOI was more than good enough in 2003, 2004 and 2005 and only fell behind after Intel’s major architecture shift from NetBust to Core2, mid-2006. It’s hard to say how much AMD’s problems since are due to SOI, which is still in use for their performance CPUs but each new node has posed problems of little improvement in clock speeds for all the effort.
    I recall that AMD had to spend $11million on help from IBM to get the initial Opterons working. I’ve been told that SOI is damnably difficult to get right and that FD-SOI could be worse than PD-SOI so I’m surprised to hear ST talking as though as it’s a fait accompli at this early stage.

  4. Not sure if the process alone can save ST-E. After all, NovaThor – the crap the ST-E cronies try to peddle to unsuspecting ignorants, is a System On Chip, with System emphasis, and not SOI transistor technology?
    I wouldn’t put too much hope in this “next big thing”, as ST-E is fueled by “our next big thing”-hypes perpetrated by the collectivist’s dirigisme.

  5. @glurp : AMD competes with Intel. If SOI was the best solution for PC MPUs Intel would be using SOI. Ipso facto AMD needs to use a bulk process from TSMC or others to compete with Intel.
    There is no denying SOI does have its uses, but PCs aren’t one of them.

  6. If this 28nm FD-SOI process delivers the goods, Anonymous, then ST-E could look like a very different kettle of fish.

  7. ST-Ericsson quick facts for companies selecting a supplier:
    3’rd rate el’ cheapo laggard products
    3’rd rate crony riddled nepotist management
    3’rd rate developer tooling, simulators, labs, computers
    2’nd rate ‘industry average’ paid developers
    1’st in a huge accumulated debt
    1’st in industry for employee dissatisfaction
    1’st in industry for unstable deliveries
    1’st in everything undertaken since competition sharpened has been a perpetual fiasco

  8. thanks David, but when chery says “At 28nm and 20nm we can offer a planar SOI solution which offers the best combination of performance and leakage,” don’t you think it’s enough to make AMD’s mind ?
    Furthermore when Rory Read said “There’s enough processing power on every laptop on the planet today”, don’t you think they’re pursuing just one same aim.
    AMD often failed in the past. But one day, AMD made a choice and found the good way by using SOI wafers in GPU/APU to get best performance and best leakage. it was a risky way but AMD get experience. Now it’s probably one of the best solutions for the future. So definitively i can not understand why Read decides to throw it away just at this moment. Something smells fishy

  9. I heard the same regarding the Modem a while back. I bet my big mouthed arrogant careerist countrymen (Swedes) isn’t yappering about the French shortcomings now, which surely must be a sobering experience.
    First the STE/SM U8500 fiasco that quite probably was the final nail in the coffin for the hardware people at Sony Mobile in Lund. Now I wonder, though, how many indirectly will be sacked due to the LTE modem delays?
    Will Nokia perhaps be late with the Windows 8 phones due to this debacle?

  10. For ST(E), the biggest risk is the maturity of the LTE modem, right now… :/

  11. I understand, glurp, that AMD had been looking at partially depleted SOI, PD-SOI, which did not have the performance/leakage advantages of fully depleted FD-SOI. However AMD, making PC chips, has the biggest priority of performance, whereas ST making chips for phones and tablets need low leakage as the main priority.

  12. can’t understand AMD’s choices with no-soi wafer at 28nm when i read your comments. it’s so huge a mistake that i can’t believe AMD won’t change his mind. it wouldn’t be long to know but i’d like to hear your views about it

  13. There’ve been a few comments via email, jaded ex-employee. The good thing is that ST has a maufacturing strategy – though with capex fixed at a set ratio to sales, it means the strategy may not be adequately funded through a downturn. If ST can execute and bring out better performing wireless ICs than Qualcomm – or at least as good – then there’ll be a huge resurgence of motivation at ST and ST-E.

  14. jaded ex-employee

    Strange that there are no comments yet. I have a simple question, is the focus on FD-SOI going to work as a strategy? Chery is very optimistic when talking about the technology, but, as always, the devil is in the details and I’m not so sure ST can successfully ramp up and get their employees motivated and get enough good products to market…

Leave a Reply

Your email address will not be published. Required fields are marked *