Intel’s triangular finfets suffer a performance disadvantage compared to rectangular finfets says Professor Asen Asenov of GlasgowUniversity who is the CEO of Gold Standard Simulations.
“Intel may have technological reasons for adopting this shape but by doing so you reduce performance by 12-15%,” Asenov told me in July, adding “IBM can make nice rectangular shaped vertical walls.”
IBM is licensing a potentially higher performing design using rectangular finfets to UMC and Globalfoundries and to the other partners in the Common Platform Alliance now also called ISDA (International Semiconductor Development Alliance).
Asked why he thought Intel has adopted this disadvantageous triangular shape, Asenov replied: “We have very little solid knowledge. Maybe there’s a technological reason associated with the deposition of HK gate dielectric over vertical walls.”
Now, EW’s technical editor, Steve Bush, returns from last week’s Imec technology forum with two explanations for Intel’s triangular fins after listening to a presentation by An Steegen, Imec’s senior vice president for process technology.
“Narrow fins get a slope profile to allow STI (shallow trench isolation material) to fill in the trench,” said Steegen, “another reason to go for slope profiling is uniform implants”