Parallel processing Xmos may target consumer FPGA

Xmos, the parallel processing start-up founded by the Professor of Computer Science at Bristol University, David May FRS, who invented the Inmos Transputer multi-core microprocessor, is thought to be targetting the low end of the FPGA market.

The XMOS chip is thought to be a reconfigurable, very low power, inexpensive chip, with the functionality largely defined by software, and aimed at the consumer market. The word is that the chip contains an array of processing elements, rather like a PicoChip array, but whereas PicoChip aims its chips at high-end, high-performance markets, Xmos will be going for low-end consumer markets. A statement on the company’s new web-site says: ‘The company’s novel processor architecture emulates hardware functionality and provides solutions within the $10billion microcontroller market. Simply stated, Xmos provides a new way of implementing hardware designs. Xmos delivers customer requirements in the form of a chip that is both designed-for-purpose and customer programmable.’ It is expected that Xmos may be making an announcement about its market intentions as early as Q2. While there have been a number of start-ups in the FPGA business recently, such as Achronix, Cswitch, MathStar and Velogix., these are all focused on the high-performance end of the market. For the moment the market is dominated by its two big gorillas, Xilinx and Altera with some 90 per cent of the market between them, and Lattice, Actel and Quicklogic which share most of the rest of the market. Xmos is expected to open up a whole new price/performance/power section of the market at the ultra-low end, currently unreachable by any existing market player. Last year, May explained to EW some of his thinking on the subject. “There is a need for a generic kind of platform, whether they are FPGAs and chips full of processors, or whatever,” said May, taking the PC102 chip from Bath-based wireless processing firm PicoChip, which is a parallel array of heterogeneous elements, as an example. “That’s not a general purpose array of processors, but it’s fairly flexible and you can imagine things that look like that which do have a fairly general purpose core,” said May. “I think alongside that you may well find that if the world shifts that way, and you get more of these generic platform technologies, then you’ll start to see an opportunity for companies that really do very little other than customise them. A sort of fabless, chip-less, IP-less company.” “I see growth in people rolling out generic technologies”, added May, “there’s no need for them to have their own IP. They configure the platform, they don’t have to do hardware design or manufacture. It sounds like the ideal business to me. We all ought to be in it.” The beauty of multi-market platforms is that they save on verification costs. “Verification is a big cost,” said May. Estimates are that 70 per cent of the cost of designing a chip is taken by verification. “With platforms, verification is split into two halves”, said May, “verification of the platform design, which is done only once, and the second half, which is verifying the application.” The Xmos FPGA is likely to have achieved some substantial software streamlining. As the progenitor of May’s Law which says software efficiency halves every 18 months, May dislikes the exponential but sloppy growth in over-complex, over-featured, cut-and-paste concocted, software. “There’s a huge opportunity to gain performance simply by working on software”, asserts May, “I would like to see serious intellectual horsepower put to making software light and efficient.” It can also be expected that the Xmos FPGA will achieve some dramatic power savings over conventional FPGAs. May has pointed in the past to the desired ambition for consumer devices that they become so power-efficient that they can scavenge their energy from the environment.

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