Silicon Valley start-up Algotochip claims to reduce SOC design to 8-16 weeks by directly converting customers’ C-algorithms into an optimal IC implementation with unprecedented power savings.
Algotochip’s CEO Satish Padmanabhan, says that the company has turned an LTE design from Germany’s MimoOn from C code to final GDSII in 12 weeks.
Based on the complexity of the application, the company says it will take 8-16 weeks to create GDSII from C code.
The company is currently on the hunt for funding, said Padmanabhan. Its customers are in the consumer industry.
Algotochip answers the question posed by Altera’s Ron Wilson last year: “Whatever became of the idea that we could define an embedded system in C, push the Compile button, and watch the tool spit out a complete hardware and software design system.”
Algotochip claims to do all the work in creating the hardware, firmware and software from a customer’s C-code. A customer does not need to use, or possess any knowledge of, Algotochip’s technology and tools.
The resulting solution is optimized for target implementations so, for the same application, the appropriate RTL will be generated for each target.
There is no need for Algotochips’s customers to license any other 3rd party IP cores for the SOC, says the company. The IP code in a customer’s C code is realized directly into Silicon IP.
The company claims its Power-Aware Architecture offers ‘superior’ dynamic and leakage power. Customers can choose their own process node and foundry.