At an early stage inthe 90nm node, Philips Semiconductors at one time bagged up a tenth of the world’s total number of taped out 90nm designs.
Synopsys’ CEO Aart de Geus had put the number of taped out designs worldwide at 50 while Rene Penning de Vries, CTO of Philips, said the company had taped out five.
The first of the five worked first time at both Crolles and TSMC which was something of a relief after the debacle of 130nm.
The first time right rate on 0.13µm was only 50 to 60 per cent for IDMs and only 5 to 10 per cent where the design is done by one company and manufactured by another, according to IBM estimates.
Philips avoided the worst problems of 0.13µm by not being among the leaders.
At 90nm, it was among the leaders which Philips attributed to using a risk avoidance methodology from the start of 90nm process development under which it identified all the risks and, step by step, sought to eliminate them.
“We asked how we could prevent the disasters of the previous generation,” said de Vries, “now, there are very good indications that we have all the fundamentals right for 90nm.”