February 2007 Archives

Multi-processor system developers have been crying out for more than a year for a benchmarking scheme which is independent.

And they have it, well almost.

Embedded benchmarking organisation EEMBC has been working on test suites for multi-core processors since last summer, but EEMBC president Markus Levy told EW, that the first multi-core processor code should be available to members within three months.

But they will not be available for general licensing until the end of the year. Why the hold-up?

So processor suppliers will be able to quote benchmark figures six months before customers get the opportunity to do their own application specific benchmarking.

EEMBC's multi-core benchmark uses evaluation software which will support symmetrical multi-core processors with shared memory. There is also a thread-based API to establish a common programming model.

All that exists and is ready to send to member companies, so why a six month wait before general licences are available?

The answer seems to be accommodating the multiplicity of applications processors need to be benchmarked for. For example, work has only just started creating multi-processor benchmark data for application such as voice-over-IP and H.264 video.

So to whet the appetite of EEMBC non-members the benchmarks (when finally available) will evaluate three forms of concurrency, including task decomposition, multiple data stream processing and the processing of multiple workloads, which assesses scalability of the application in question.

But all this needs the interface which makes the test data relevant to real-world applications.

So hang on a little longer.

In 1996 Intel built its first supercomputer capable of teraflops performance. It was called ASCI Red and was built for the Sandia National Laboratory.

It took up more than 2,000 square feet, was powered by nearly 10,000 Pentium Pro processors, and consumed over 500kW of power.

Just over 10 years on and Intel says it has achieved the equivalent performance from a single multi-core chip.

But is this parallel computing gone crazy or a taster for what will really be needed to power the server farms which run the Internet a decade from now?

Intel has no plans to bring this chip, designed with no fewer than 80 floating point cores, to market. But the lessons learnt in designing its on-chip interconnect architecture and power management algorithms will be used in generations of multi-core processors to come.

The real message should be energy-efficiency. Teraflops performance may boggle the mind but the microprocessor industry has more practical considerations theses days. Maybe it feels it can save the planet with sustainable designs. And that is what multi-cores are all about.

According to Intel, the 80-core research chip consumes only 62W, which is about what a Xeon processor running at 2.4GHz consumes.

But AMD has been quicker to press the power efficiency button. Last week v-p Randy Allen challenged the industry to step-up efforts to increase energy efficiency in order to reduce energy consumption.

He was responding to a study, funded by AMD, which found that US data centres consumed five million kW of energy, the equivalent of five 1,000 MW power plants "I believe these findings are a wake-up call not just for the IT industry, but also for global business, government and policy leaders," said Allen.

The subtext to this message is "go multi-core my son"