ARM teaches world how to use SOI process technology

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ARM is working with the SOI Industry Consortium to run a silicon on insulator (SOI) design seminar. 

The company recognises a need to help IC designers understand the significant differences between designing on SOI versus bulk silicon, to achieve power-saving and integration benefits.

The mantra coming out of this event is that srinking semiconductor feature sizes demonstrate that CMOS on bulk silicon is rapidly reaching its technological limits for many applications. 

There is a theory that ARM could force a rethink on low-power process technology

ARM is claiming potential power savings of up to 40% using a silicon-on-insulator (SOI) 45nm test chip.

The SOI process, an alternative to the traditional bulk CMOS process used to fab ARM-based processors, was demonstrated on a test chip was based on an ARM 1176 processor.

According to ARM, the demonstration shows that SOI technology is a "viable alternative to traditional bulk process technology when designing low-power processors".

"Process complexity, variability, short-channel effects, leakage, power density, and reliabilityre just a few reasons why technology leaders transition to SOI," said the SOI Industry Consortium.

Foundry processes, libraries, EDA tools and designer training are making SOI accessible to fabless semiconductor companies.

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This page contains a single entry by Richard Wilson published on October 13, 2009 8:21 PM.

Arrow's free tool offer allows designers to test before they buy was the previous entry in this blog.

Intel talks of "momentum" and things look a little better is the next entry in this blog.

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