Parallel Lines

In 1996 Intel built its first supercomputer capable of teraflops performance. It was called ASCI Red and was built for the Sandia National Laboratory.

It took up more than 2,000 square feet, was powered by nearly 10,000 Pentium Pro processors, and consumed over 500kW of power.

Just over 10 years on and Intel says it has achieved the equivalent performance from a single multi-core chip.

But is this parallel computing gone crazy or a taster for what will really be needed to power the server farms which run the Internet a decade from now?

Intel has no plans to bring this chip, designed with no fewer than 80 floating point cores, to market. But the lessons learnt in designing its on-chip interconnect architecture and power management algorithms will be used in generations of multi-core processors to come.

The real message should be energy-efficiency. Teraflops performance may boggle the mind but the microprocessor industry has more practical considerations theses days. Maybe it feels it can save the planet with sustainable designs. And that is what multi-cores are all about.

According to Intel, the 80-core research chip consumes only 62W, which is about what a Xeon processor running at 2.4GHz consumes.

But AMD has been quicker to press the power efficiency button. Last week v-p Randy Allen challenged the industry to step-up efforts to increase energy efficiency in order to reduce energy consumption.

He was responding to a study, funded by AMD, which found that US data centres consumed five million kW of energy, the equivalent of five 1,000 MW power plants "I believe these findings are a wake-up call not just for the IT industry, but also for global business, government and policy leaders," said Allen.

The subtext to this message is "go multi-core my son"

Multi-processor system developers have been crying out for more than a year for a benchmarking scheme which is independent.

And they have it, well almost.

Embedded benchmarking organisation EEMBC has been working on test suites for multi-core processors since last summer, but EEMBC president Markus Levy told EW, that the first multi-core processor code should be available to members within three months.

But they will not be available for general licensing until the end of the year. Why the hold-up?

So processor suppliers will be able to quote benchmark figures six months before customers get the opportunity to do their own application specific benchmarking.

EEMBC's multi-core benchmark uses evaluation software which will support symmetrical multi-core processors with shared memory. There is also a thread-based API to establish a common programming model.

All that exists and is ready to send to member companies, so why a six month wait before general licences are available?

The answer seems to be accommodating the multiplicity of applications processors need to be benchmarked for. For example, work has only just started creating multi-processor benchmark data for application such as voice-over-IP and H.264 video.

So to whet the appetite of EEMBC non-members the benchmarks (when finally available) will evaluate three forms of concurrency, including task decomposition, multiple data stream processing and the processing of multiple workloads, which assesses scalability of the application in question.

But all this needs the interface which makes the test data relevant to real-world applications.

So hang on a little longer.

Multi-core processors may be the new rock n roll for the likes of Intel, AMD and Texas Instruments, but what they are saying about the potential of parallel processing architectures is not really new. All they are doing is taking the concept to the wider embedded systems market.

Last week Mike Hames, senior v-p, Texas Instruments, speaking the company's Developer Conference (TIDC) in Dallas, was predicting the likelihood that hundreds of processors will be integrated on a single, three-dimensional chip.

Anyone interested in parallel processing silicon circa 1995. I have just noticed that two IMST805 -G25S : Floating Point Transputers sold for £22 on eBay.

With all this talk of Intel and AMD dual and quad cores, the sleeping giant of the multi-core processor battle could be PowerPC. Freescale is demoing its MPC8641D dual-core device based on Power Architecture technology at the second annual Multicore Expo Conference and Exhibition on March 27-29.

This is the firm's first dual core Power processor and if EEMBC is to be belived the results are pretty impressive.

Freescale Semiconductor, post private equity buyout, seems to have made an important committment to its Scottish wafer fab at East Kilbride where over 1,200 people are employed.

According to a report in the Sunday Herald, Denis Griot, senior vice-president and general manager for Freescale in Europe, indicated that the Scottish fab was integral to Freescale's business strategy and no job cuts were planned.

Students in the Department of Electrical Engineering and Computer Science at the Massachusetts Institute of Technology (MIT) have used a PS3 to study the parallel processing capabilities of the Cell microprocessor.

No, these weren't gamers, but the first students on a course at MIT based on the workings of the microprocessor which was developed by IBM, Sony and Toshiba.

NetLogic Microsystems' latest knowledge-based processor, the NL8000, can achieve an impressive 1.2 billion decisions per second.

This is more than double the packet processing performance of the firm's last device and the trick is a dual-core technology and a first-of-its-kind ability to parse decisions into 64 unique processing elements.

Freescale Semiconductor's multi-core system-on-chip (SoC) processor for 3D graphics on the car dashboard combines a Power core with a PowerVR graphics core designed by UK firm Imagination Technologies.

But the chip will also provide audio functions such as noise cancellation and voice recognition for dashboard control.

Toshiba’s approach to Cell differs from that of development partners Sony and IBM in that it sees the multiprocessor architecture as co-processor technology which sits alongside the host CPU, not replacing it.

“We do not want to get in to a battle creating the next host processor architecture,” Emily Shirley, head of product marketing at Toshiba Europe, told EW.

I have reported before on the interesting phenomenon of students implement general purpose parallel processing system design on a PS3 games console.

I thought it was just a whacky idea to promote Cell or to keep the students amused. Not a bit of it. Multi-processor-based graphics engines may be good at rendering your Halo 3 images but they can also be put to use for other number-crunching tasks such as analysing geological data.

Is this the first in-car navigation hardware to use multi-core processor performance? I have had a quick scan around and I cannot find anything similar.

NEC's NaviEngine1 has no fewer than four ARM11 MPcores carrying out multi-processing. With all that processing power it requires a fast internal bus and so NEC has integrated a Serial ATA interface.

Do designers consider multi-core architecture support as a critical factor in the choice of embedded operating systems? Not generally, says market research firm Venture Development Corporation (VDC).   

Multi-core architectures are increasingly being used by designers but the availability of software support for multi-processing systems seems to be of relatively low importance even to those developers who indicated that they were using a multi-core or multi-core and multiprocessor design.