Guest Post: Ruminating Rigid-Flex – Fab documentation (Part 2)
Today, designers face increasing project requirements for densely populated electronic circuits including pressures to reduce manufacturing times and costs, writes Ben Jordan of Altium, in the second of a three-part series. To meet these requirements, design teams have increasingly turned to 3D rigid-flex circuits to meet their project’s performance and production requirements. However, designing for flex or rigid-flex presents a number of challenges to electronic and mechanical design teams, that require careful consideration.
In the last blog on rigid-flex PCBs, I talked about the fabrication processes typically used by board houses. It’s important to understand the steps required to build up a rigid-flex or flex circuit PCB because it has a big effect on how you need to design the board. And it also affects what needs to be included in your fabrication data set to send the design to successful fabrication.
Today, I’ll discuss a few of the documentation requirements needed to get a flex or rigid-flex circuit board fabricated. Along with a few flex-circuit related issues to watch out for.
This is essentially where we tell the fabricator what we want, and it’s probably the most likely part of the process where errors or misunderstandings can make costly delays and waste happen. Fortunately there are standards we can reference to make sure we are communicating clearly to the fabricator, in particular IPC-2223.
It could boil down to a few golden rules:
- Make sure your fabricator is capable of building your rigid-flex design.
- Make sure they collaborate with you on designing your layer stack to fit their particular processes.
- Use IPC-2223 as your point of reference for design, making sure the fabricator uses the same & related IPC standards – so they are using the same terminology as you.
- Involve them as early as possible in the process.
Output Data Set
In interviewing a handful of rigid-flex capable board houses locally, we found that many designers still present gerber files to the board house. However ODB++ v7.0 or later is preferred, since it has specific layer types added to the job matrix that enable clear flex-circuit documentation for GenFlex® and similar CAM tools. Additionally ODB++ provides complete data sets for bare-board and in-circuit testing. A subset of the data included is shown in table 1.
|Table 1: Subset of Layer Types in ODB++ (v7.0 and later) used for GenFlex(Source: ODB++ v7.0 Specification)
There are some issues we face if using gerber for the output data set, or earlier versions of ODB++. Namely, the fabricator will need separate route tool paths and die cut patterns for each rigid and flex circuit section in the layer stack. Effectively, mechanical layer films would need to be produced to show where voids need to be in the rigid areas, and more to show where coverlay or covercoat will be on the exposed flex circuit areas. The coverlay or covercoat also has to be considered a mask for component pads for those components that may be mounted on flex circuit areas.
IPC-2581 is also a preferred data standard, as it provides the entire database for the design and testing in a convenient XML file format. At the time of writing this standard is in early stages of refinement and adoption, but promises to be the new pervasive replacement for Gerber files.
As a designer, the question is really then, how can I define these areas, layers and stacks?
Define the stack by area using a table
The most important documentation you can provide your fabricator is arguably the layer stack design. Along with this, if you’re doing rigid-flex, you have to provide different stacks for different areas, and somehow mark those very clearly. A simple way to do this is make a copy of your board outline on a mechanical layer, and lay down a layer stack table or diagram with a pattern-fill legend for the regions containing the different layer stacks. An example of this is shown in figure 3.1.
Figure 3.1: An example of a stack diagram showing fill patterns for rigid and flex circuit areas.
In this example, the matching fill patterns are used for different stack areas to indicate which stackup layers are included in the Flexible part or the Rigid part. You can see here the layer item named “Dielectric 1” is actually an FR-4 core, which could alternatively be considered a stiffener.
This poses a new problem, in that you also have to define in 2D space where bends and folds can be, and where you will allow components and other critical objects to cross the boundaries of rigid and flexible sections.
Conveying the PCB design intent
We all know a picture is worth a thousand words. If you can generate a 3D image showing flexible and rigid areas this will help the fabricator understand your intent more clearly. Many people do this currently with the MCAD software, after having imported the STEP model from the PCB design, but it’s far better to be able to generate the imagery directly from the PCB CAD tool. Figure 3.2 is an example of this concept.
Figure 3.2: Bending up the mechanical model to show design intent.
This of course can have the added benefit of detecting flex-to-flex and flex-to-rigid interferences ahead of fabrication. As is the case with Altium Designer, the online Design Rule Checker (DRC) interactively shows where interferences occur.
When it comes to final product assembly, it is even more desirable to provide the assembly manager and staff with a 3D animated movie of how the rigid-flex board will fold for installation into the product enclosure or assembly. This is where having a screen capture or 3D movie straight for the CAD tool can be very helpful as part of the final assembly documentation package.
You can see also from Figure 3.2, that rigid-flex designs imply that components might exist in layers other than top and bottom. This is a bit tricky in the PCB design software, because normally components must exist on top or bottom. So we need some ability to place components on inner layers.
Interestingly, Altium Designer has always supported pad objects on any layer, so this is not impossible. There’s also an implication that silkscreen could exist on flex layers as well. This is not a problem, since coverlay material can adhere well to the silkscreen ink. The trick is more to make sure there’s adequate contrast for the color of ink chosen against the coverlay material. Also, resolution is affected since the ink has to traverse a small gap beyond the screen to land on the flex circuit coverlay. Again, this is something that needs to be discussed with the fabricator to determine what’s possible and economical.
Note: If you’re going to the effort of drawing the regions of the PCB which are exposed flex layers, and placing components on those regions, this also makes a reasonable method for placing embedded components into cutout regions of the board. You need to generate a set of very clear documents that show where the cutouts are and in which sections of the layer stack they apply. This is going to be limited depending on the fabricators methods – either back-drilling or multiple laminated stack-ups can be used. So communicating your intent and minimizing the number of separate cutout stack sections is important. It’s best to completely avoid having intersecting cutouts from opposite sides of the board.
Conventional wisdom calls for stiffeners or rigid sections where components will be mounted on flex anyway for dynamic applications. This is to prevent dry solder joints and copper cracks due to fatigue caused by circuit movement around rigid component pins. In some circumstances – such as the flexible LED lighting strips shown in Figure 3.3, this is not necessary because the flexible strip is installed into a fixed backing, thereafter it will be static. This situation is referred to in IPC-2223 as ‘Flex to Install’.
Figure 3.3: Flex-to-Install LED lighting strip. (Source: SafestChina.com)
For more information you can download this free guidebook at http://go.altium.com/rigid-flex-pcb-design-guidebook.html
Ben Jordan got his start in electronics as an 8 year old, when his big brother got him his first soldering iron with a multivibrator LED flasher kit. Ben holds a Bachelor of Engineering with First Class Honors from the University of Southern Queensland, and has worked as an AE, FAE and in Marketing and management roles at Altium since 2004. Ben has more than 20 years experience designing electronics, PCBs, and embedded computing and FPGA hardware and software, and has research interests in signal processing, audio electronics, and PCB design.Tags: Altium