electroramblings

The official ElectronicsWeekly.com website blog, highlighting new features, content, and initiatives on the site.

Chipworks shows how DRAM caps are evolving

05mar07pcs-sdram.jpgChipworks, the nice reverse engineering people from Canada, have an analysis blog on their site looking at how DRAM capacitors are made. The snappy headline So you thought DRAM capacitors are made of only polysilicon and oxide or nitride…? looks at a Powerchip 512Mbit DDR2 SDRAM. Hopefully you can see a micrograph of the device on the left. Chipworks notes a change in construction of the stacked capacitors:

They are still made inside deep narrow holes that have been etched in inter-metal dielectrics, but their electrodes and the capacitor dielectric layer are more complex than they used to be.

Powerchip seems to have increased the surface area of their caps by using a layer of hemispherical grain (HSG) polysilicon which has formed bumps and niches – clearly visible in the image:

Since the charge stored in a capacitor can be expressed as Q = AVKε/t, where A – capacitor area, V – voltage on the capacitor, K – capacitor dielectric layer constant, ε – permittivity of vacuum, and t – capacitor dielectric layer thickness, the increased area A results in more charge being stored in the capacitor, with the same bitline voltage and the same dielectric layer thickness.

Go to the Chipworks’ page for nice big images and a fuller description.

Tags: caps, dram, layer thickness, narrow holes, powerchip

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