Normally, silicon scaling is a good thing. Except when you are making power devices, as people working in the automotive semiconductor business explained at the Design Automation and Test in Europe (DATE) conference this week in Dresden. Klaus Meder, president of the automotive electronics division at Robert Bosch, explained in…
The Texas Instruments MSP430 is practically synonymous with low-power processors and, although the company may not care much for the idea of clones of the architecture appearing, that is being helped by a crop of research processors that explore the limits of the threshold voltage of CMOS transistors. These…
The electronic edition of the winter issue of Chip Design magazine contains a round table discussion about rapid prototyping and the interview wastes no time in asking about the technique’s role in low-power design, which is not quite a direct one yet.
Juergen Jaeger, senior product marketing manager…
EETimes has put a video on YouTube that shows short excerpts from the keynote given by HP Labs’ Prith Banerjee at the recent DesignCon in California where he talks about the work being done there to use optical interconnect to take backplane speeds from 10 to 300GB/s and higher…
Low-Power Engineering has posted the last instalment of its round-table interviews on making software more energy efficient and some of the problems that face an industry that needs to expose low-level hardware details through a compiler-insulated interface.
The experts were: Adam Kaiser, Nucleus RTOS architect at…
Carbon Design Systems has produced a site that makes it possible to download transaction-level models for use in system-level simulation to let designers see how IP cores will perform, and potentially feed into high-level power analysis using, as John Blyler notes in his blog, sites such as…
Transaction-level modelling and system-level analysis are important tasks for any low-power design activity given the major savings that can be made at this level: simply stopping transactions from repeating needlessly pays big in terms of reducing circuit activity and, with it, energy usage. So, a new release…
It’s the season for predictions and Brian Bailey, writing at EDN points out some power-related issues among other predictions made by some of the people he asked.
Bailey argues that system-level design will continue to pick up adopters partly because of power:
“As Paul van Besouw of…