Ruminations on the electronics industry from David Manners, Senior Components Editor on Electronics Weekly.
Achronix sampling 22nm finfet FPGAs
Achronix, the high performance FPGA specialist, is sampling customers with products made on Intel’s 22nm finfet process.
“We’re sampling several customers,” Achronix CEO Robert Blake, tells me. That’s between 10 to 50 parts per customers. Intel has apparently made over 100 wafers for Achronix.
The first product from Intel’s Oregon fab is a 1m LUT/10m ASIC gates FPGA called HD1000. It uses Intel’s IP for SerDes, embedded memory blocks, PLLs and programmable I/O.
As well as fabbing the part, Intel is also doing assembly and test and device qualification. “In Q3 we’ll have full product qualification done by Intel,” says Blake.
Intel is providing advanced packaging. The HD1000 is in a 2600 ball BGA. “From the SerDes standpoint in our devices, because we have 26000 BGA we get a lot more bandwidth,” says Blake.
As might be expected, customers are all in high-speed areas like communications, high performance computing, and test and measurement. “It’s tailored to a segment of the marketplace – the interfaces have been chosen for these markets,” says Blake.
The HD1000 supports the hard interfaces 10/40/100 gigabit Ethernet MAC, DDR3 Phy and Controller, up to 2133 Mbps, PCI Express Gen 1/2/3 and 100 gigabit Interlaken.
“We have a growing back-log of customer design activity,” said Blake, “which could support revenues of $100m plus. There’s a huge amount of interest.”
Equivalent functionality on 28nm planar costs twice as much, claims Achronix, while design time and power consumption are halved. Static power consumption on 22nm is 3 – 1 less than on 28nm, claims the company.
In Q2 Achronix expects to sample a 660,000 LUT part called HD680 and, by the end of the year, Achronix expects to have a 1,725,000 LUT part called HD1500. Next year, in Q1, it comes out with a 265,000 LUT part.
Waiting to get Intel’s 22nm process, rather than having its FPGAs made on a 28nm process, was a risk and a delay to revenue receipt.
“The advantages of choosing to delay and accept the risk was clearly the right decision,” says Blake.
He expects to be getting revenue from parts made on the 22nm process this year.Tags: ceo robert, equivalent functionality, plls, power consumption, robert blake