mannerisms

Ruminations on the electronics industry from David Manners, Senior Components Editor on Electronics Weekly.

Who was to blame, Altera or TSMC?

Was TSMC to blame, or was it Altera? Both companies have kept very quiet about the hiccup last May which caused Altera to issue a statement saying they would not be in production of their Stratix III 65nm chips until 2008. Today that changes with Altera announcing it is sampling 65nm chips. Not Stratix, the high performance family, but Cyclone, the low power family. It means that Altera has got to 65nm half ayear earlier than it expected when it made that announcement back in May 2006.

“There were some high fives on Logic Drive (the address of Xilinx’s HQ) when we heard that”, said a Xilinx staffer at the time. In May 2006, Xilinx had been sampling 65nm for a couple of months, and were planning volume production in Q1 2007. The thing was that Altera was TSMC’s development partner on what TSMC calls its ‘G’ process, the foundry’s high performance 65nm process. TSMC usually lets its development partner dictate the pace of development of a process and allows its partner to set the timing for the introduction of the process. Had there been problems in Taiwan with getting the G process up and running? Or were the industry rumours true that Altera had gone back to the drawing board with Stratix III and re-designed the family? If the latter were the case, they would naturally postpone the launch date for the process. Neither TSMC, not Altera were telling. In May 2006, TSMC was making 65nm chips, not on the G process, but on its low-power 65nm process. TSMC’s development partner for low power 65nm was Qualcomm which wanted a low-power process for chips used in mobile phone handsets. By the end of last year, TSMC had 15 customers from the telecoms and consumer sectors for the low power 65nm process, and had run 7,000 300mm 65nm wafers. So it’s a natural decision for Altera to announce today that it is bringing out its low power family, Cyclone III, first. The die are tiny, so it doesn’t take many wafers to produce enough samples for its 250 early access customers. Volume production is slated for August. By now the process must be running very smoothly and Altera will only suffer the indignity of being six months behind Xilinx into volume production on 65nm, rather than a full year. As for Stratix III, Altera’s high performance 65nm family, that’s still on schedule for Q307 sampling and Q108 volume production.

Tags: altera, cyclone, development partner, drawing board, qualcomm

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