Is FPGA Stuck In A $3.6 billion Niche?
On December 1st last year we did a post called: ‘FPGA Industry On The Wrong Track. It argued that the FPGA industry is becoming more like the SOC business with products targeted for specific applications instead of relying on its essential strength – flexibility and programmability. Moreover that the FPGA industry isn’t tackling its two major problems: that its products are too expensive and use too much power.
Recently I had a chance to ask Moshe Gavrielov, CEO of Xilinx, the world’s largest programmable logic company what he thought about this criticism.
I pointed out to him that the traditional expectation for programmable logic was that it would eat away at the overall logic TAM. And for the first couple of decades of its life, it did. Now, however, that progress seems to have stalled.
“We are perceived to be stuck in a $3.6bn niche,” said Gavrielov.
On the upside, he can say: “ASIC design starts are dropping precipitously”. But in dollars ASIC is growing.
That’s because, replies Gavrielov,: “A few applications with very high dollars are being serviced by ASICs. Cell phones and games machines apps are huge. They will continue to be served by very sophisticated ASICs. They are propping up the ASIC dollar numbers. But mid-range ASIC users are dropping like flies.”
On the need to bring down cost. “We did not have a very competitive low-cost solution for years. Now we do – Spartan,” says Gavrielov.
Asked if an SRAM-based technology is the best route to reducing cost, he replies: “When you look at the amount of the die used by the SRAM it’s not that big.”
On the power problem, he says: “In the past, customers didn’t care about the power. Those days are over. Now it’s a huge design goal for our teams. We will nail these things. The penalty you pay will shrink. I’m not going to tell you that an SRAM solution is perfect but it’s possible to over-estimate the penalty. If you chuck away all the SRAM you wouldn’t notice a significant change in area or on the power front.”
How about the sea-of-processors approach to doing programmable logic? Does that have any attractions for Xilinx?
“I was a graduate in the 70s”, responds Gavrielov, “there was a lot of research being done on sea-of processors 30 years ago. Same thing is true today. There is some specialised use sea-of-processors, and processor-based FPGA-killers had a surge of VC investment a few years ago. But they’re going out of business. You Brits have been good at this. Inmos had some spectacularly sexy stuff, but it’s ARM who is laughing all the way to the bank. There are still three or four guys in the US who think they’re going to change the world.”
On the other hand, Gavrielov doesn’t rule out Xilinx ever using a processor-based approach. “The technology is continuously evolving and there’s nothing in our DNA which precludes us from going in that direction.
So how does Gavrielov see the FPGA industry breaking out of its $3.6bn niche? What’s going to drive growth?
“The opening up of the FPGA flow to other parties is essential to the broadening of the market”, says Gavrielov, “we need to provide additional entry points: the ASIC designer; people less adept than that like DSP algorithm developers, software developers working in a C-level environment.”
Will there ever be such a thing as a C-programmable FPGA? “We will see C-programmable FPGAs”, says Gavrielov, “the only reason I’m sceptical is not if it will happen, but when it will happen.”
The tools aren’t there. “It hasn’t happened in ASIC yet. The tools from Mentor and Cadence haven’t been developed”, says Gavrielov, “we’re still at the very early stages. Once technology gets to that point it will trickle down quickly to FPGA. We see some customers experimenting. It will happen in the ASIC world in the next two to three years then in the FPGA world.”
Tags: cell phones, design goal, dropping like flies, flexibility, xilinx