MathStar takes on Xilinx and Altera
Can start-up MathStar take on the 300lb gorillas Xilinx and Altera in the programmable logic market by changing the power/performance paradigm?
MathStar, the high performance programmable logic start-up, will produce its second generation, 90nm, chip in October, a year after shipping its first chip, and its looking at MRAM as a possible technology for a non-volatile version. The new chip will take it into the medical imaging and test and measurement markets. “The test and measurement people need a chip able to do 32-bit arithmetic. The 90nm chip can do that very effectively”, says MathStar co-founder and CEO Douglas Pihl. It seems madness to go into a mature market, over 20 years old, with not one but two 300lb gorillas, Xilinx and Altera, dominating the space. But MathStar feels that the marketplace is fragmenting giving them the opportunity to get in at the super high-speed end on it. MathStar started shipping its first production-ready chip in the US in November to 17 customers, and the first products using the chip will be on the market in Q1 or early Q2. MathStar’s first chip is a 1GHz device containing 400 processing elements for use in processing multiple streams of high definition video and multiple protocols. The first design-wins are in machine vision and professional video equipment. The second, 90nm chip, will contain 600 processing elements and the speed will go up by 15 to 20 per cent to 1.2GHz. It will come in two forms, a MAC-heavy version in October 2007, and an ALU-heavy version in January 2008. Pihl has previously founded and sold (for over $300m each) two companies called Rocketships and NetStar. Pihl’s co-founder is Minnesota academic Professor Bob Johnson. Together they developed software for running supercomputer code faster and decided that they could build a chip to implement the technique. “We thought we could create an array-based architecture of very small computing elements”, says Pihl, “customers would come to us with a problem and we would produce a chip for them. We would spend several million dollars taping it out and the customers wanted, maybe, 1,000 chips. So the business case didn’t work out. So we said: ‘Let’s take the same array and make it programmable’.” MathStar reckons its more deterministic flow gets round the problem of design tool cost which afflicts all programmable logic start-ups. “We have a simple design flow because we have largely eliminated the timing closure issue”, says Pihl. It still has the problem of developing its own IP. “It’s a raw manpower issue”, says Pihl. He hopes to overcome it by partnering. The business then raised $30m in seed capital, and raised another $26m at its IPO in 2005 and may need to raise another $20m to $25m to become cash-flow positive. MathStar is making its move into Europe this year with a couple of FAEs already appointed, and a couple more planned for the end of the year. Also it has recruited a crop of European repping companies. With the history of the programmable logic industry one of slow consolidation around Xilinx and Altera, with Lattice Actel and Quicklogic holding defensive niches, it will be interesting to see if the new wave of start-ups, like MathStar, can open up the industry to some real innovation and a new market dynamic.