Ruminations on the electronics industry from David Manners, Senior Components Editor on Electronics Weekly.
New Memories At ISSCC 2010
NAND scaling has already extended further than expected, but the search for alternative non-volatile memories continues apace. At ISSCC 2010 in San Francisco next month, progress in a number of alternatives will be presented:
A 64Mb STT (Spin Transfer Torque)-MRAM which is the highest density yet achieved. The cell size is 0.358μm2 in 65nm CMOS, and it has a 30ns access time.
A 64Mb CMOx memory, the technology being pioneered by Unity Semiconductor, which is the highest density yet achieved for CMOx. It is made in 0.13μm CMOS in a four-layer 0.17μm2 cross-point-cell array. Using the multi-layer capability, this memory is scalable to 64Gb capacity.
The fastest 12ns 4Mb embedded PCM (Phase-Change Memory) in 90nm CMOS ever reported. The fast read is achieved by using low-voltage MOS in the hierarchical column decoder
A 1Gb PCM, the highest density PCM ever achieved, made in 45nm CMOS with 1.8V operation. It has features the fastest-ever read/write performance with 266MB/s and 9MB/s read/write throughputs respectively.
Another way of getting to higher memory density will very likely be 3D stacking and, at ISSCC2010, the first prototype of a commercially-viable cost-effective 3D-stacked IC will be demonstrated by IMEC. It is based on a new analysis of methodologies for the use of Through-Silicon Vias (TSVs).
TOMORROW MORNING: Ten Black Swans For 2010Tags: cell array, cross point, mram, tomorrow morning, volatile memories