TSMC Developing FD-SOI
TSMC is looking at FD-SOI. That’s not news, but the fact that TSMC has started filing patents on FD-SOI technology is news, and this was reported by Eric Esteve on SemiWiki.
Esteve quotes from a patent filed by TSMC: “Devices formed on SOI substrates offer many advantages over their bulk counterparts, including absence of reverse body effect, absence of latch-up, soft-error immunity, and elimination of junction capacitance typically encountered in bulk silicon devices. SOI technology therefore enables higher speed performance, higher packing density, and reduced power consumption.”
TSMC has had its chances to license FD-SOI from ST and, ever since rival foundry Samsung, took an FD-SOI licence from ST, TSMC must be wondering whether it made the right decision.
As well as FD-SOI’s advantages over bulk, it also has advantages over finfet beyond just lower power. Professor Asen Asenov, Professor of Electrical Engineering at Glasgow University and CEO of statistical analysis specialist Gold Standard Simulations reckons that FD-SOI’s superior scaling characteristics mean that: “14nm FD-SOI will be 40% cheaper than 14nm finfet.”
Moreover, points out Esteve, TSMC’s patent appears to relate to a highly sophisticated mobile IC suggesting that FD-SOI is the best choice in this application.
Clearly all the mobile IC houses are looking at FD-SOI as an option because of its low power potential. The fact that TSMC is developing the technology suggests that a customer or customers have enquired about using FD-SOI, and TSMC is heavily into bed with near-neigbour MediaTek which is currently motoring.