Built with multiple 1.25 GHz DSP cores, TI is offering the industry’s first 10-GHz DSP with 320 GMACs and 160 GFLOPs of combined fixed- and floating-point performance on a single device.
Using TI’s C66x multicore DSPs, infrastructure developers can now more easily design integrated, software upgradeable, power and cost-efficient platforms in markets such as mission critical, including public safety and defense, medical and high-end imaging, test and automation, high-performance computing and core networking.
The C66x DSP generation is based on TI’s KeyStone multicore architecture, designed to maximize the throughput of on-chip data flows and eliminate the possibility of bottlenecks, so that developers can fully utilize the vast processing power of the DSP cores.
The family includes three pin-compatible multicore DSPs in two, four and eight core versions, the TMS320C6672, TMS320C6674 and TMS320C6678 respectively, as well as a four-core communications System-on-Chip (SoC), the TMS320C6670.
With TI’s multicore software developer’s kit (MC-SDK) and suite of multicore tools, as well as an ecosystem of software and hardware partners, TI’s multicore silicon architecture is now open to customers.
C66x multicore DSPs are software compatible with TI’s existing TMS320C6000 DSPs, enabling vendors to reuse their existing software and preserve their investment in TI.