The board supports both standard Virtex-7 -compatible FMC (VITA 57) mezzanine cards as well as providing for higher throughput modules such as the TADF-4300, which features 12.5GS/s analogue-to-digital (ADC) and digital-to-analogue (DAC) technologies developed by Tektronix.
Curtiss-Wright partnered with Tektronix Component Solutions on the jointly-developed TADF-4300 module.
Combined, these two modules form the CHAMP-WB-DRFM and provide a high bandwidth platform for wideband digital radio frequency memory (DRFM) processing, delivering 12.5GS/s 8-bit ADC and 12.5GS/s 10-bit DAC performance from a single 6U slot.
Based on Tektronix’s silicon germanium (SiGe) based data converters, the TADF-4300, when coupled with the CHAMP-WB’s on-board Virtex-7 FPGA and high-speed wideband interfaces, will support the design of embedded DRFM solutions with “3x the performance of existing CMOS-based offerings”, said the company.
The cards can also be used in commercial applications such as direct RF digitisation, ground-penetrating radar (GPR) and coherent optical applications.
Defence and aerospace applications include sense & response applications that require wideband capability and low latency, such as DRFM, EW, Signal Intelligence (SIGINT), and Electronic Counter Measures (ECM).
In addition to operating as a 12.5 GS/s ADC/DAC unit the TADF-4300 module can also operate in a dual-channel 6.25 GS/s ADC-only or DAC-only mode. The module contains built-in clock generation and calibration logic for maintaining optimal performance in different environments and over temperature.
“Our new CHAMP-WB-DRFM card set represents a game-changer for high performance EW processing using open standards-based COTS technology,” said Lynn Bamford, senior vice president and general manager of Curtiss-Wright Controls Defense Solutions.
“The establishment of our data converters business was in direct response to requests from instrumentation customers to access the underlying high-performance ADC and DAC technologies,” said Tom Buzak, president, Tektronix Component Solutions.
Commercial DSP performance
The CHAMP-WB board’s data plane connects directly to the FPGA with support for Gen2 Serial RapidIO (SRIO) data plane fabric.
Alternate fabrics can also be supported with different FPGA cores. A Gen3 PCI Express switch connected to the board’s expansion plane enables a single host card to control multiple CHAMP-WB cards without utilising data-plane bandwidth.
Memory support on the CHAMP-WB includes two (2) 64-bit 4GB DDR3L memory banks that provide up to 8GB of on-card data capture or pattern generation capability.
The board features two high-bandwidth FMC sites that have been enhanced with an auxiliary connector to provide additional I/O capability. Twenty back-plane SERDES links, which can operate up to 10.3Gbit/s, and 16 LVDS pairs provide additional I/O capability.
The TADF-4300 module supports sampling in the 2nd nyquist zone, to analyse signals up to 8 GHz and provides sub-30 ns latency for the ADC and sub 10ns for the DAC.