Mitsubishi Intros SDRAM For Low-Power Consumption Handhelds
Mitsubishi Intros SDRAM For Low-Power Consumption Handhelds News from E-InSite
The Electronic Device Group of Mitsubishi Electric & ElectronicsUSA Inc. today introduced a series of low-power synchronous DRAMs (LP-SDRAMs) for use inhandheld, portable and wireless products.
The Sunnyvale, Calif.-based company said the devices will comply with the JEDECstandard currently being defined for low-power SDRAM. Mitsubishi Electric’s LP-SDRAMsutilize low current consumption to help extend battery life, with special functions toreduce average current and peak current, the company said. It does this by operating thememory array at 2.5 volts and by using a 1.8-volt I/O interface.
The first member in the new family is a 64Mbit LP-SDRAM, in a 4Mbit-by-16Mbitconfiguration, and developed in a 0.18-micron process technology.
“Mitsubishi Electric’s new LP-SDRAM family gives cost-sensitive wirelessproducts the high memory density necessary to support the new, advanced system featuresthat customers want while keeping the drain on batteries at a very low level,” saidCecil Conkle, assistant vice president of DRAM marketing at Mitsubishi Electric, in astatement.
Mitsubishi claims the 64Mbit LP-SDRAM achieves a 300-uA self-refresh current for theentire array, which is 40 percent less than conventional SDRAM. It also has a “partialarray self-refresh” function to reduce this current further by refreshing only acritical portion of the array during the self-refresh cycle.
Mitsubishi said it plans to offer the 64Mbit LP-SDRAM in both the JEDEC-proposed54-ball BGA standard package and a 64-pin shrink thin small outline package (STSOP).Samples of the former are expected in September priced at $17, and the latter in July at$15. Volume production is scheduled for the fourth quarter.
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