Altera hit by 28nm shortage; sales, profits fall.

Altera has been hit by the 28nm shortage. Following Qualcomm’s complaints of lack of 28nm parts from TSMC, Altera has also said it was short of 28nm supply in Q1.

Altera’s Q2 revenues were 16% down on Q4 at $383m and profit down to $115m from $147m in Q4. $90m cash was generated.

“Demand in the last month of the quarter was generally lighter than forecasted, particularly from customers in the communications vertical market,” says Altera CEO John Daane, “in addition, we experienced some mix issues as we attempted to fulfil orders that arrived in the last month of the quarter.”

The attempts were frustrated by lengthening lead-times on 28nm and 40nm parts from TSMC and a capacity situation there described as ‘very tight’.

“These factors were the major contributors to quarterly revenue that was well below our previous outlook,” adds Daane, “as we enter the second quarter, our backlog position has significantly improved reflecting stronger demand for our products. We expect a rebound in our business in the second quarter.”

“Our portfolio of 28-nm FPGAs is displaying strong design-win momentum,” says Daane, “we continue to benefit from both our incumbency position and a tailored architecture approach that optimises the performance of each of our 28nm FPGA families.”

Altera is now delivering 28nm production-qualified Stratix V FPGAs, manufactured using TSMC’s 28nm High Performance (28HP) process.

Altera began shipping engineering samples of the industry’s first high-end 28-nm FPGAs in April 2011 and moved to production in less than a year with eight Stratix V family members now in production.

The first of Altera’s 28nm Cyclone V FPGAs are now shipping. Availability of the Cyclone V family completes Altera’s release of its 28nm tailored product portfolio. The Cyclone V family is developed on TSMC’s 28nm Low Power (28LP) process.

During Q1 Altera and TSMC announced an heterogeneous 3D IC test vehicle using TSMC’s Chip-on-Wafer-on-Substrate (CoWoS) integration process. It allows the stacking of various technologies within a single device, including analogue, logic and memory.

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