ARM physical IP for UMC 28nm

ARM and UMC have agreed to offer the ARM Artisan physical IP platform along with ARM’s POP IP for UMC’s 28nm high-performance low-power (HLP) process technology.

ARM Dipesh Patel

‘UMC’s 28nm dual process roadmap includes both poly SiON and High-K/Metal Gate,” says S. C. Chien, vice president, IP and Design Support Division at UMC, “28HLP is the foundry industry’s most competitive Poly SiON 28nm technology in terms of power consumption, performance and area.”

The ARM POP IP for the Cortex-A7 processor is targeted for 1.2GHz on UMC’s 28HLP platform, and delivery began in December 2013.

UMC’s 28HLP process a 28nm Poly-SiON technology aimed at low power consumption without compromising performance, for portable applications including wireless LAN, and both wired and handheld consumer products.

UMC is currently in pilot production for customer products on 28HLP, with volume production expected in early 2014.

“Through our close collaboration with UMC, ARM’s physical IP and POP IP enable optimal SoC implementation and streamline the design,” says ARM’s Dipesh Patel, “our standard cells, next-generation memory compilers and POP IP deliver the features, quality, and rigorous silicon validation that UMC’s customers demand.”

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