More than a quarter of the world’s wafer capacity is for processes better than 40nm, says IC Insights.
At the end of 2012, about 27% of global wafer capacity was for devices having geometries smaller than 40nm. Such devices include high-density DRAM, which are typically built using 30nm- to 20nm-class process technologies; high-density flash memory devices that are based on 20nm- to 10nm-class processes; and high-performance microprocessors and advanced ASIC/ASSP/FPGA devices based on 32/28nm or 22nm technologies.
About 22% of global capacity is dedicated to the =80nm – <0.2µ segment, which includes the 90nm, 0.13µ, and 0.18µ process generations—“mature” processes that are widely used by pure-play foundries including TSMC, UMC, GlobalFoundries, SMIC, and TowerJazz to manufacture a broad range of products for their diverse customer bases.
The least common technologies, at least in terms of the share of total installed capacity, are between the geometries of 80nm and 60nm (essentially the 65nm generation) and between 0.4µ and 0.2µ (essentially the 0.25µ and 0.35µ generations).
However, it is worth noting that the >0.4µ category maintains a fairly large share of total capacity, even though it has been longer than a decade-and-a-half since 0.5µ process technology was considered leading-edge. The main reason is that huge quantities of commodity type devices such as standard analog and general-purpose logic are manufactured with well-established process technologies having larger then 0.4µ feature sizes. In addition, high-voltage IC products require large-geometry process technologies.
Samsung, Intel, Toshiba/SanDisk, SK Hynix, and Micron top the list with the greatest amount of leading-edge capacity.
The biggest capacity holders in the large-feature process category (>0.2µ) consist of several analog and mixed-signal chip suppliers.
See also: Who Has The Most 300mm Capacity?