The non-planar future

The 2013 International Technology Roadmap for Semiconductors (ITRS) has been released by the SIA.

Apart from saying that IC process technology will reach the few nanometers range ‘well within the 15-year horizon of the 2013 ITRS’ , the 2013 roadmap is not like previous roadmaps which put a date on new nodes.

The 2013 ITRS points to ‘the combination of 3D device architecture and low power devices will usher in a new era of scaling identified in short as “3D Power Scaling.” ‘

‘The increase in the number of transistors per unit area will eventually be accomplished by stacking multiple layers of transistors,’ says the ITRS.

Progress in manipulation of edgeless wrapped materials (e.g., carbon nanotubes, graphene combinations, etc.) offer the promise of ballistic conductors, which may emerge in the next decade.

Multi-die 2.5D and 3D packaging is another route to increased integration.

New devices coming along include spin wave device (SWD) – a type of magnetic logic device exploiting collective spin oscillation (spin waves) for information transmission and processing.

SWD converts input voltage signals into the spin waves, computes with spin waves, and converts the output spin waves into the voltage signals.

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