Latest Electronic Memory Components News

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NAND scaling issues becoming more complex

NAND process geometries have become as problematic as logic process geometries with the advantages of further scaling – especially as 3D NAND approaches – being questioned…

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Big data is big opportuntiy for flash memory, says IBM

Adoption of flash memory in the data centres will allow enterprises to harness the potential of big data. This was the message from IBM’s Jamie Thomas and Michael Kuhn speaking at the Flash Memory Summit taking place in Santa Clara, California this week. Analysing big data in real-time…

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TLC NAND flash gets error correction it needs to takeoff

Interest in triple-level cell (TLC) NAND flash is growing and the high density flash memory technology could have cost benefits over single-level NAND in SSDs, but only if endurance and retention questions marks are addressed. For US-based NAND flash controller supplier Silicon Motion Technology the answer is…

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UMC licenses 55nm flash memory for wearables

United Microelectronics Corporation (UMC) has licensed embedded flash memory intellectual property (IP) from Cypress Semiconductor for the 55nm process technology node. Cypress claims its SONOS embedded nonvolatile memory (NVM) process requires fewer additional mask layers to insert it into a standard CMOS process, specifically, three to four additional masks. The…

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Adaptive DDR4 silicon IP runs at 2.8Gbit/s, says Uniquify

Uniquify is claiming its adaptive DDR4 silicon IP running at 2.8Gbit/s with SK Hynix’s DDR4 SDRAM memory components implemented using TSMC’s 28HPM process technology. The adaptive DDR4 IP dynamically tracks and adjusts the critical DDR timing interface to allow the DDR4 SDRAM to be clocked at…

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Micron and Wave protect SSD drives from malware attack

Micron Technology has teamed with security specialist Wave Systems to develop technology to protect embedded computing platforms from malware attacks. The firms say this level of security requires close integration of software and hardware, and they will develop systems to detect advanced persistent threats (APTs), the most advanced forms of…

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Spansion cuts pin-count in high speed NOR flash chips

Spansion has introduced a chip interface it claims will reduce the number of pins on large high performance system-on-chip (SoC) devices. The first devices to be based on the HyperBus interface will be NOR flash memory with read throughput of up to 333Mbyte/s. Take the Electronics Weekly…

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