Rohm adds to protected EEPROM range
Rohm Semiconductor has added 512k and 1Mbit devcies to its BR24 family of EEPROM with I2C bus.
With speeds to up to 1MHz, all EEPROMs feature a double cell structure to eliminate accidental failures, and a double protection circuit to prevent writing errors.
Rewriting is performed by passing electrons through a tunnel oxide film. This, however, causes deterioration of the film, eventually leading to memory failure where the memory cell data is locked at ‘1’ and cannot be rewritten to.
According to the supplier, the double cell structure prevents this by allotting two cells for each memory bit, connected in an OR configuration so that the second cell is able to operate upon failure of the first.
The double protection circuit consists of a Power ON Reset (POR) block that resets during start-up and a Low Voltage Write Error Protection Circuit (LVCC) that prevents write operations and resets during low voltage conditions (LVCC and below).
Data can be rewritten up to 1.000.000 times and stored for 40 years.
Providing a wide range of memory capacities, from 32k up to 1Mbit, the new devices can be delivered in standard packages such as SO8 and TSSOP8.