Space optimisation with DDR memory
With each step-change in the number of microprocessor cores integrated into a single chip, board-level designers need to find space for the additional memory required to support higher levels of processing power.
In the consumer sector, this means sufficient memory to support dual-core processors. For enterprise applications, it means supporting processors which integrate up to 12 cores.
Whilst more memory-intensive applications, such as service providers and data centres, the demand for multi-channel, gigabit Ethernet and additional functions such as anti-virus scanning and web-blocking, is driving the typical number of cores per processor up to 32 or beyond. Cloud computing, server virtualisation and high-end medical imaging are also moving swiftly to multi-core processing.
Commercial pressures are also at work, demanding that the physical size of the overall system, and the individual boards within the system, are reduced to maximise the value of the real-estate that they occupy.
This presents designers with a double challenge: the need to deliver more memory density whilst reducing the memory footprint.
Moving up to DDR3
For example, the Cavium CN68xx family of processors integrates from 8 to 32 cores to deliver a 2X to 5X performance increase compared to the previous generation processors.
Each of the four memory channels within a CN68xxx processor supports two banks of DIMMs giving a total of eight DIMMS per processor, as shown in Figure 1.
Using existing DDR2 memory in a standard DIMM form factor, this configuration would provide a total capacity of 8GB per controller and a peak data transfer rate of 8533 MB/s. By moving to next-generation DDR3 memory, the same footprint could deliver 32GB of memory per channel to increase the overall capacity to a128GB per processor with a peak data transfer rate of 17066 MB/s.
Overall, DDR3 provides twice the data rate and bus frequency of the previous generation, DDR2 memory, whilst also achieving a lower power draw per chip than DDR2.
DDR2 supports data rates of 400 to1066 MT/s, with peak data transfer rates of 3200 to 8533 MB/s: whilst DDR3 doubles this to achieve data rates of up to 2133 MT/s with peak data transfer rates of 6400 to 17066 MB/s. Speed is also doubled, taking the DDR2 I/O bus frequency of 200 to 800 MHz, up to 400 to 1600 MHz with DDR3.
DDR3 also eliminates any trade-off between performance and power consumption with 1.5V operation per chip, compared to the 1.8V per chip required by DDR2 memory.
Mounting and layout options
In order to push the boundaries of memory density even further, the move to DDR3 can be combined with new, space-saving modules as well as creative layout and mounting configurations.
Swissbit’s new XR-DIMM DDR3 memory module enables higher levels of density by achieving capacity of 1GB to 8GB in a 38mm x 67.5mm package. The XR-DIMM supports full DDR3-1600 / EP3-12800 and provides error detection and correction using Error-Correcting Code (ECC).
An 8GB version is planned for Q3/2012. Compatibility with DDR3 72b SO-DIMM pin definitions and Serial-Presence Detection (SPD) allows this rugged module to be used as an easy upgrade for SODIMM, even in industrial and military applications.
To support higher performance, a balanced signal-to-ground ratio becomes critical. The 244-pin Mini-DIMM or 240-pin XR-DIMM packages have increased power/GND pins compared to the 204-pin SODIMM packages.
Creative mounting options for the XR-DIMM, and other form factors such as Mini-DIMM and R-DIMM, can also help designers to push memory density to higher limits. The XR-DIMM can be parallel-mounted on a mezzanine card above the memory on the main card.
Angled sockets can also help to optimise board space by reducing the height of the board to enable more boards to be slotted into each rack.
Using TE Connectivity’s DDR3 204 position SO-DIMM right-angled socket provides a PCB height of 4.0mm to10.0mm to increase the flexibility of PCB component positioning. The equivalent 240-pin Mini-DIMM socket has a height of 9.79mm , to provide a maximum seating height of 6.29mm.
Higher frequency also means that board design becomes more complex and PCB layout more challenging. It is important to locate the memory as close as possible to the processor and to balance the distance between the chips to achieve the correct timing for the memory.
At present, high-end memory density probably means using DDR2 in the Mini-RDIMM format: to take memory density to the levels required to support multi-core processing may mean using DDR3 to increase capacity to 128GB of DDR3 memory per processor.
However, despite the obvious advantages in capacity, speed and power-consumption, DDR3 may not suit every application. Careful evaluation of a range of memory technologies, packages and mounting options, supported by advice and layout support from Acal BFi specialists, can help designers to optimize available board space and to achieve the significant increases in memory density demanded by multi-core processors.