ARM sees first FinFET Cortex-A7 on Samsung process
ARM and Cadence Design Systems have announced the tape-out of the first 14-nanometer test chip implementation of the ARM’s lowest power core, the Cortex-A7 processor.
Designed with a complete Cadence RTL-to-signoff flow, the chip was fabricated on Samsung’s 14-nanometer FinFET process.
This is the nextstep in implementing ARM technology-based SoCs on FinFET technology.
“This is an important milestone in our efforts to enable our silicon partners for continued low-power leadership in future generations of innovative, energy-efficient mobile products,” said Dr. Dipesh Patel, vice president and general manager, physical IP division at ARM.
This test chip also includes ARM Artisan standard-cell libraries, next-generation memories, and general purpose IOs.
“Our collaboration with ARM and Samsung, is essential to semiconductor companies as they move to designing for a 14-nanometer FinFET process,” said Dr. Chi-Ping Hsu, senior vice president, Research and Development, Silicon Realization Group at Cadence.
According to Dr. Kyu-Myung Choi, senior vice president at Samsung Electronics: “Our collaboration with ARM and Cadence allows us to innovate quickly as Samsung develops this new process technology for mobile multimedia applications.”