Imagination aims to change things with MIPS Warrior core
The MIPS P5600 core has been designed with low power mobile, consumer and embedded applications in mind.
The P5600 supports multicore configurations of up to six cores per cluster with high-performance cache coherency, hardware virtualization, 128-bit SIMD, plus significant microarchitecture optimizations for maximizing SoC system performance.
The core can exploit the efficiencies of SIMD execution in data-parallel applications such as audio codecs, image processing, DSP, low-level simple 2D graphics and other media-rich applications. The SIMD engine used in the P5600 supports a range of data types from 8-bit integer up to native double precision floating point operations.
“This is about much more than the arrival of yet another CPU IP core,” said Tony King-Smith, executive v-p marketing, Imagination.
“This is the start of something much bigger, the rollout of a comprehensive family of next-generation CPUs that will change the CPU IP landscape forever.”
Target applications are SoCs for mobile phones and tablets, connected consumer products such as set-top boxes, DTVs and multiroom multi-channel audio systems, home and office networking and micro-servers.
Specified CPU IP performance is 5 CoreMark/MHz with 3.5 DMIPS/MHz
The P5600 cores are the first MIPS CPU IP cores to include highly-optimized hardware virtualization as defined in the MIPS r5 architecture announced December 2012.