1.5GHz 22nm FPGAs from Achronix
Achronix has announced details of its 22nm FPGAs, made on Intel’s finfet chip process. First engineering samples should ship in Q3.
Aimed at networking and called Speedster22i, the devices will include hard logic for 10/40/100 Gigabit Ethernet (with protocol stack), Interlaken (an industry first), PCI Express Gen 1/2/3, and 2.133Gbit/s DDR3 memory controllers.
“Implemented in the programmable fabric, these interfaces would consumes up to 500,000 equivalent look-up-tables [LUTs]“, claimed Achronix. “For the communications target applications, the embedded hard IP consumes up to 90% less power than implementing the same functionality in the programmable fabric of general purpose FPGAs.”
The firm has early silicon.
“We got 10.3Gbit/s from the serdes this morning”, Achronix chairman John Holt told Electronics Weekly at a briefing last Thursday.
In a 500,000 LUT example running at 250MHz, Holt insists that compared with FPGAs made on TSMC’s 28nm processes (like Xilinx’ and Altera’s products), his 22nm finfet FPGAs will cost less, have half the static power, and 20% less dynamic power in the programmable fabric.
Time will tell.
There will be two product families: high density (prefix HD) and high performance (HP), that share the same I/O and hard IP.
HD will have four members, with the largest having 1.1 million LUTs and 144Mbit of on-die RAM.
With this there will be up to 16 28Gbit/s serdes, 64 12.75Gbit/s serdes, and 960 general purpose 2.133Gbit/s I/Os.
“The HD family offers the industry’s highest I/O bandwidth, which is critical for high-end switch and bridging applications,” claimed Achronix.
HP is faster at up to 1.5GHz, and will use the firm’s patented self-timed architecture. First chips will appear in Q1 next year.
“The HP FPGAs are designed to achieve maximum performance for feed-forward data flow and DSP applications,” said the firm. “The largest member has 250,000 LUTs and 64Mbits of embedded RAM.”
“We already have first orders,” said Holt. “These customers are the ones that helped us decide that the products looked like.”
First out will be the HD1000 with a 700,000 LUTs, 84Mbit RAM, 756 28×28 multipliers, 64 12.75GHz serdes lanes, 2x100G Ethernet (splitable to more slower channels), two Interlaken interfaces, two PCI Express and six DDR3 controllers – all in a 1,385 pin 52x52mm BGA.
Both the HD and HP families are supported by Achronix’s Eclipse-based ACE design tools, version 4.2.
Exacly what is going on at Intel remains a mystery to outsiders – why is it offering foundary services on its flagship in-house 22nm finfet process, which is presumably very busy making its own x86 processors?
According to Holt, as well as the announced smaller firms like his, some large companies are also using Intel to make their 22nm chips.