How to calculate power in FPGA design
As FPGA devices include more logic, memory and special functions, such as memory interfaces, DSP blocks and multiple high-speed SERDES channels, and move to successively leading edge process technologies, they increasingly challenge system power requirements. In response, a designer might be tempted to strap an iceberg to the board, but think of the mess and that dangerous puddle the IT guys would have to deal with. While the iceberg is a less than practical solution, there is another way: use tools to accurately calculate power requirements.
Both static and dynamic power are critical elements in power calculation. FPGA vendors are committed to providing viable low-power consumption devices, but as process technologies shrink from 130nm to 90nm to 65nm and so on, transistors become inherently more leaky and static power consumption rises. Further, the extremely high performance requirements of systems using FPGAs drive dynamic power consumption up, a function of the frequency and the number of switching nodes.
So, how can a designer accurately determine device power consumption, taking into account all the meaningful elements that contribute to the problem, and effectively make the necessary design trade-offs required to build a reliable system that meets all the performance requirements?
Understanding the power consumption in an FPGA is important for two main considerations: sizing of system power supplies and thermal considerations. It is obvious that all devices in the system require a good, clean, accurate and reliable power supply to operate efficiently. It is important to calculate power consumption accurately in order to effectively size the power supply, but at the same time not to over-size the supply, which will increase the cost. Thermal management is imperative mainly for system reliability purposes.
All devices have recommended guidelines for tolerable device junction temperatures. Exceed these guidelines, and run the risk of inefficient operation or, worse, permanent system damage. Of course, there are ways to mitigate thermal issues through techniques such as adding heat sinks or airflow to the system to lower the effective operating temperature. So how can the designer accurately estimate power consumption and the device’s thermal profile before the system is built? Talk about a chicken-and-egg problem! Fortunately, there is a Power Calculator that is specially designed for the task.
The basic elements necessary to assess power consumption accurately and to build a thermal model are:
- Device elements: FPGA (both used and unused elements), package, frequency of operation, activity factors and speed grade.
- Environmental elements: Heat sink, airflow, board size and ambient temperature.
- Usability elements: Ability to model at any time in the design process, import real operating data and easily make “what-if” assessments of the complete environment.
Because the Power Calculator must be usable throughout the design process, it is important to make device selection available within the tool. It also is important that the user have the option to try different packages, devices, densities, speed grades and temperature ranges. The thermal profile also must be readily available to give the user a clear understanding of the safe operating environment.
This Power Calculator tool provides very clear individual workspaces, in the form of tabs, for each architectural, or resource, element available on the device. For usability’s sake, the tool displays both current and power for each power supply, and the power consumed by each element and all the elements combined.
This gives a complete picture of what each element contributes to the overall power consumption, and allows the user to decide how best to optimize the design to reduce the total power consumption. This tabular representation is very valuable, but graphics also can be useful.
Environmental variables also must be easy to set and modify. The stock thermal model provided with the tool, or a custom defined model, may be used in the calculation. This is important to provide flexibility and accuracy for any design environment. The user also may set heat sink and airflow parameters and the effective Theta-JA to be used in the calculation. All of these elements are critical to correctly analyzing the real system environment and making the necessary design choices to achieve the desired performance and reliability results.
Having a complete system-level understanding and accurate power model will allow the designer to make the decisions necessary to complete the design. Then the designer can concentrate efforts on actions that can reduce power consumption, including:
- Reducing the device operating voltage
- Optimizing the clock frequencies
- Reducing long routes in the design
- Optimizing encoding
- Optimizing the thermal model
With all the data showing the device resources used in the design, all the environmental variables critical to building the thermal model and the freedom to use and modify the parameters at any point in the design process, the FPGA design can be implemented reliably and will meet system performance targets.
Tim Schnettler works with Lattice SemiconductorTags: FPGAs, Lattice Semiconductor, power efficiency